📄 changelog
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Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com) * hppa.h (pa_opcodes): Use 'fX' for first register operand in xmpyu. * hppa.h (pa_opcodes): Fix mask for probe and probei. * hppa.h (pa_opcodes): Fix mask for depwi.Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com) * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as an explicit output argument.Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com) * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores. Add a few PA2.0 loads and store variants.1999-09-04 Steve Chamberlain <sac@pobox.com> * pj.h: New file.1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au> * i386.h (i386_regtab): Move %st to top of table, and split off other fp reg entries. (i386_float_regtab): To here.Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com> * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args by 'f'. * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi. Add supporting args. * hppa.h: Document new completers and args. * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor, uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions pmenb and pmdis. * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl, hshr, hsub, mixh, mixw, permh. * hppa.h (pa_opcodes): Change completers in instructions to use 'c' prefix. * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg, hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments. * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg, fnegabs to use 'I' instead of 'F'.1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au> * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd. Document pf2iw and pi2fw as athlon insns. Remove pswapw. Alphabetically sort PIII insns.Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com> * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com> * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and, and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr. * hppa.h: Document 64 bit condition completers.Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com> * hppa.h (pa_opcodes): Change condition args to use '?' prefix.1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au> * i386.h (i386_optab): Add DefaultSize modifier to all insns that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf, sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com> Jeff Law <law@cygnus.com> * hppa.h (pa_opcodes): Add "pushnom" and "pushbts". * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT. * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd, and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au> * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com) * hppa.h (struct pa_opcode): Add new field "flags". (FLAGS_STRICT): Define.Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com> Jeff Law <law@cygnus.com> * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction. * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au> * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl, lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP flag to fcomi and friends.Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com) * hppa.h (pa_opcodes): Move integer arithmetic instructions after integer logical instructions.1999-05-28 Linus Nordberg <linus.nordberg@canit.se> * m68k.h: Document new formats `E', `G', `H' and new places `N', `n', `o'. * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u' and new places `m', `M', `h'.Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com * hppa.h (pa_opcodes): Add several processor specific system instructions.Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com) * hppa.h (pa_opcodes): Add second entry for "comb", "comib", "addb", and "addib" to be used by the disassembler.1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au> * i386.h (ReverseModrm): Remove all occurences. (InvMem): Add to control/debug/test mov insns, movhlps, movlhps, movmskps, pextrw, pmovmskb, maskmovq. Change NoSuf to FP on all MMX, XMM and AMD insns as these all ignore the data size prefix. * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD. Mostly stolen from Doug Ledford <dledford@redhat.com>Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com> * ppc.h (PPC_OPCODE_64_BRIDGE): New.1999-04-14 Doug Evans <devans@casey.cygnus.com> * cgen.h (CGEN_ATTR): Delete member num_nonbools. (CGEN_ATTR_TYPE): Update. (CGEN_ATTR_MASK): Number booleans starting at 0. (CGEN_ATTR_VALUE): Update. (CGEN_INSN_ATTR): Update.Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com) * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0 instructions.Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com) * hppa.h (bb, bvb): Tweak opcode/mask.1999-03-22 Doug Evans <devans@casey.cygnus.com> * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs. (struct cgen_cpu_desc): Rename member mach to machs. New member isas. New members word_bitsize,default_insn_bitsize,base_insn-bitsize, min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables. Delete member max_insn_size. (enum cgen_cpu_open_arg): New enum. (cpu_open): Update prototype. (cpu_open_1): Declare. (cgen_set_cpu): Delete.1999-03-11 Doug Evans <devans@casey.cygnus.com> * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member. (CGEN_OPERAND_NIL): New macro. (CGEN_OPERAND): New member `type'. (@arch@_cgen_operand_table): Delete decl. (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete. (CGEN_OPERAND_TABLE): New struct. (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare. (CGEN_OPINST): Pointer to operand table entry replaced with enum. (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table', now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to {get,set}_{int,vma}_operand. (@arch@_cgen_cpu_open): New arg `isa'. (cgen_set_cpu): Ditto.Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com> * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.1999-02-25 Doug Evans <devans@casey.cygnus.com> * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE. (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to enum cgen_hw_type. (CGEN_HW_TABLE): New struct. (hw_table): Delete declaration. (CGEN_OPERAND): Change member hw to hw_type, change type from pointer to table entry to enum. (CGEN_OPINST): Ditto. (CGEN_CPU_TABLE): Change member hw_list to hw_table.Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com> * alpha.h (AXP_OPCODE_EV6): New. (AXP_OPCODE_NOPAL): Include it.1999-02-09 Doug Evans <devans@casey.cygnus.com> * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC. All uses updated. New members int_insn_p, max_insn_size, parse_operand,insert_operand,extract_operand,print_operand, sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand, get_vma_operand,set_vma_operand,parse_handlers,insert_handlers, extract_handlers,print_handlers. (CGEN_ATTR): Change type of num_nonbools to unsigned int. (CGEN_ATTR_BOOL_OFFSET): New macro. (CGEN_ATTR_MASK): Subtract it to compute bit number. (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation. (cgen_opcode_handler): Renamed from cgen_base. (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated. (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR, all uses updated. (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global. (enum cgen_opinst_type): Renamed from cgen_operand_instance_type. (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated. (CGEN_OPCODE,CGEN_IBASE): New types. (CGEN_INSN): Rewrite. (CGEN_{ASM,DIS}_HASH*): Delete. (init_opcode_table,init_ibld_table): Declare. (CGEN_INSN_ATTR): New type.Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com> * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define. (x_FP, d_FP, dls_FP, sldx_FP): Define. Change *Suf definitions to include x and d suffixes. (movsx): Use w_Suf and b_Suf. (movzx): Likewise. (movs): Use bwld_Suf. (fld): Change ordering. Use sld_FP. (fild): Add Intel Syntax equivalent of fildq. (fst): Use sld_FP. (fist): Use sld_FP. (fstp): Use sld_FP. Add x_FP version. (fistp): LLongMem version for Intel Syntax. (fcom, fcomp): Use sld_FP. (fadd, fiadd, fsub): Use sld_FP. (fsubr): Use sld_FP. (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.1999-01-27 Doug Evans <devans@casey.cygnus.com> * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT, CGEN_MODE_UINT.1999-01-16 Jeffrey A Law (law@cygnus.com) * hppa.h (bv): Fix mask.1999-01-05 Doug Evans <devans@casey.cygnus.com> * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef. (CGEN_ATTR): Use it. (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto. (CGEN_ATTR_TABLE): New member dfault.1998-12-30 Gavin Romig-Koch <gavin@cygnus.com> * mips.h (MIPS16_INSN_BRANCH): New.Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com> The following is part of a change made by Edith Epstein <eepstein@sophia.cygnus.com> as part of a project to merge in changes by HP; HP did not create ChangeLog entries. * hppa.h (completer_chars): list of chars to not put a space after.Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com> * i386.h (i386_optab): Permit w suffix on processor control and status word instructions.1998-11-30 Doug Evans <devans@casey.cygnus.com> * cgen.h (struct cgen_hw_entry): Delete const on attrs member. (struct cgen_keyword_entry): Ditto. (struct cgen_operand): Ditto. (CGEN_IFLD): New typedef, with associated access macros. (CGEN_IFMT): New typedef, with associated access macros. (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'. (CGEN_IVALUE): New typedef. (struct cgen_insn): Delete const on syntax,attrs members. `format' now points to format data. Type of `value' is now CGEN_IVALUE. (struct cgen_opcode_table): New member ifld_table.1998-11-18 Doug Evans <devans@casey.cygnus.com> * cgen.h (cgen_extract_fn): Update type of `base_insn' arg. (CGEN_OPERAND_INSTANCE): New member `attrs'. (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros. (cgen_dis_lookup_insn): Update type of `base_insn' arg. (cgen_opcode_table): Update type of dis_hash fn. (extract_operand): Update type of `insn_value' arg.Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com> * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com> * mips.h (INSN_MULT): Added.Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au> * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com> * cgen.h (CGEN_INSN_INT): New typedef. (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN. (CGEN_INSN_BYTES): Renamed from cgen_insn_t. (CGEN_INSN_BYTES_PTR): New typedef. (CGEN_EXTRACT_INFO): New typedef. (cgen_insert_fn,cgen_extract_fn): Update. (cgen_opcode_table): New member `insn_endian'. (assemble_insn,lookup_insn,lookup_get_insn_operands): Update. (insert_operand,extract_operand): Update. (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com> * cgen.h (CGEN_ATTR_BOOLS): New macro. (struct CGEN_HW_ENTRY): New member `attrs'. (CGEN_HW_ATTR): New macro. (struct CGEN_OPERAND_INSTANCE): New member `name'. (CGEN_INSN_INVALID_P): New macro.Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com) * hppa.h: Add "fid".Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au> From Robert Andrew Dale <rob@nb.net> * i386.h (i386_optab): Add AMD 3DNow! instructions. (AMD_3DNOW_OPCODE): Define.Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com> * d30v.h (EITHER_BUT_PREFER_MU): Define.Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com> * cgen.h (cgen_insn): #if 0 out element `cdx'.Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com> Move all global state data into opcode table struct, and treat opcode table as something that is "opened/closed". * cgen.h (CGEN_OPCODE_DESC): New type. (all fns): New first arg of opcode table descriptor. (cgen_set_parse_operand_fn): Add prototype. (cgen_current_machine,cgen_current_endian): Delete. (CGEN_OPCODE_TABLE): New members mach,endian,operand_table, parse_operand_fn,asm_hash_table,asm_hash_table_entries, dis_hash_table,dis_hash_table_entries. (opcode_open,opcode_close): Add prototypes. * cgen.h (cgen_insn): New element `cdx'.Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com> * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com) * mn10300.h: Add "no_match_operands" field for instructions. (MN10300_MAX_OPERANDS): Define.Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com> * cgen.h (cgen_macro_insn_count): Declare.Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com> * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define. (cgen_insert_fn,cgen_extract_fn): New arg `pc'. (get_operand,put_operand): Replaced with get_{int,vma}_operand, set_{int,vma}_operand.
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