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📄 ads8361cfg_c.c

📁 ADS8361 驱动to the TMS320VC5416 DSP
💻 C
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/*   Do *not* directly modify this file.  It was    *//*   generated by the Configuration Tool; any  *//*   changes risk being overwritten.                *//* INPUT ads8361.cdb *//*  Include Header File  */#include "ads8361cfg.h"/*  Config Structures */DMA_Config dmaCfg0 = {    0x0000,        /*  Channel Priority (0x0000 or 0x0001)  */    0x0000,        /*  Global Reload Register Usage in Autoinit Mode (AUTOIX : 0x0000 or 0x0001)  */    0x0000,        /*  Transfer Mode Control Register (DMMCR)  */    0x5000,        /*  Sync Event and Frame Count Register (DMSFC)  */    NULL,        /*  Source Address Register (DMSRC) - Symbolic  */    NULL,        /*  Destination Address Register (DMDST) - Symbolic  */    0x0000,        /*  Element Count Register (DMCTR)  */    NULL,        /*  Global Source Address Reload Register (DMGSA) - Symbolic  */    NULL,        /*  Global Destination Address Reload Register (DMGDA) - Symbolic  */    0x0000,        /*  Global Element Count Reload Register (DMGCR)  */    0x0000         /*  Global Frame Count Reload Register (DMGFR)  */};DMA_GblConfig gDMAConfig0 = {    0x0,        /*  Breakpoint Emulation Behavior (FREE)  */    0x0000,        /*  Global Reload Register Usage in Autoinit Mode (AUTOIX : 0x0000 or 0x0001)  */    NULL,        /*  Source Program Page Address Register (DMSRCP) - Symbolic  */    NULL,        /*  Destination Program Page Address Register (DMDSTP) - Symbolic  */    0x0000,        /*  Element Address Index Register 0 (DMIDX0)  */    0x0000,        /*  Frame Address Index Register 0 (DMFRI0)  */    0x0000,        /*  Element Address Index Register 1 (DMIDX1)  */    0x0000,        /*  Frame Address Index Register 1 (DMFRI1)  */    NULL,        /*  Extended Source Data Page Register (DMSRCDP) - Symbolic  */    NULL         /*  Extended Destination Data Page Register (DMDSTDP) - Symbolic  */};MCBSP_Config mcbspCfg1 = {    0x0020,        /*  Serial Port Control Register 1   */    0x02c0,        /*  Serial Port Control Register 2   */    0x0060,        /*  Receive Control Register 1   */    0x0044,        /*  Receive Control Register 2   */    0x0000,        /*  Transmit Control Register 1   */    0x0041,        /*  Transmit Control Register 2   */    0x000f,        /*  Sample Rate Generator Register 1   */    0x2013,        /*  Sample Rate Generator Register 2   */    0x0000,        /*  Multichannel Control Register 1   */    0x0000,        /*  Multichannel Control Register 2   */    0x0600,        /*  Pin Control Register   */    0x0000,        /*  Receive Channel Enable Register Partition A   */    0x0000,        /*  Receive Channel Enable Register Partition B   */    0x0000,        /*  Receive Channel Enable Register Partition C   */    0x0000,        /*  Receive Channel Enable Register Partition D   */    0x0000,        /*  Receive Channel Enable Register Partition E   */    0x0000,        /*  Receive Channel Enable Register Partition F   */    0x0000,        /*  Receive Channel Enable Register Partition G   */    0x0000,        /*  Receive Channel Enable Register Partition H   */    0x0000,        /*  Transmit Channel Enable Register Partition A   */    0x0000,        /*  Transmit Channel Enable Register Partition B   */    0x0000,        /*  Transmit Channel Enable Register Partition C   */    0x0000,        /*  Transmit Channel Enable Register Partition D   */    0x0000,        /*  Transmit Channel Enable Register Partition E   */    0x0000,        /*  Transmit Channel Enable Register Partition F   */    0x0000,        /*  Transmit Channel Enable Register Partition G   */    0x0000         /*  Transmit Channel Enable Register Partition H   */};/*  Handles  */MCBSP_Handle hMcbsp1;/* *  ======== CSL_cfgInit() ========   */void CSL_cfgInit(){    hMcbsp1 = MCBSP_open(MCBSP_PORT1, MCBSP_OPEN_RESET);    MCBSP_config(hMcbsp1, &mcbspCfg1);}

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