📄 d100sw.h
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/****************************************************************************
** COPYRIGHT (C) 1994-1997 INTEL CORPORATION **
** DEVELOPED FOR MICROSOFT BY INTEL CORP., HILLSBORO, OREGON **
** HTTP://WWW.INTEL.COM/ **
** THIS FILE IS PART OF THE INTEL ETHEREXPRESS PRO/100B(TM) AND **
** ETHEREXPRESS PRO/100+(TM) NDIS 5.0 MINIPORT SAMPLE DRIVER **
****************************************************************************/
/****************************************************************************
Module Name:
d100sw.h
This driver runs on the following hardware:
- 82557/82558 based PCI 10/100Mb ethernet adapters
(aka Intel EtherExpress(TM) PRO Adapters)
Environment:
Kernel Mode - Or whatever is the equivalent on WinNT
Revision History
- JCB 8/14/97 Example Driver Created
*****************************************************************************/
#ifndef _D100SW_
#define _D100SW_
#define D100_OFFSET(field) ( (UINT) FIELD_OFFSET(D100_ADAPTER,field) )
#define D100_SIZE(field) sizeof( ((D100_ADAPTER *)0)->field )
#define D100_NDIS_MAJOR_VERSION 0x5
#define D100_NDIS_MINOR_VERSION 0x0
#define D100_DRIVER_VERSION ((D100_NDIS_MAJOR_VERSION*0x100) + D100_NDIS_MINOR_VERSION)
// NDIS BusType values
#define ISABUS 1
#define EISABUS 2
#define PCIBUS 5
//- Driver defaults
#define LOOKAHEAD_SIZE 222
//-------------------------------------------------------------------------
//- Macros to read and write from IO ports
//-------------------------------------------------------------------------
#define D100_READ_UCHAR(_port, _pValue) \
NdisRawReadPortUchar( \
(ULONG)(_port), \
(PUCHAR)(_pValue) \
)
#define D100_WRITE_UCHAR(_port, _Value) \
NdisRawWritePortUchar( \
(ULONG)(_port), \
(UCHAR) (_Value) \
)
#define D100_READ_USHORT(_port, _pValue) \
NdisRawReadPortUshort( \
(ULONG)(_port), \
(PUSHORT)(_pValue) \
)
#define D100_WRITE_USHORT(_port, _Value) \
NdisRawWritePortUshort( \
(ULONG)(_port), \
(USHORT) (_Value) \
)
//- Macros peculiar to NT
//- The highest physical address that can be allocated to buffers.
#define D100_ALLOC_MEM(_pbuffer, _length) NdisAllocateMemoryWithTag( \
(PVOID*)(_pbuffer), \
(_length), \
'001E')
#define D100_FREE_MEM(_buffer,_length) NdisFreeMemory((_buffer), (_length), 0)
//- Size of the Ethernet Header
#define ENET_HEADER_SIZE sizeof(ETH_HEADER_STRUC)
#define MAX_PCI_CARDS 12
//-------------------------------------------------------------------------
// PCI Cards found - returns hardware info after scanning for devices
//-------------------------------------------------------------------------
typedef struct _PCI_CARDS_FOUND_STRUC
{
USHORT NumFound;
struct
{
ULONG BaseIo;
UCHAR ChipRevision;
ULONG SubVendor_DeviceID;
USHORT SlotNumber; // Ndis Slot number
ULONG MemPhysAddress; // CSR Physical address
UCHAR Irq;
UCHAR NodeAddress[ETH_LENGTH_OF_ADDRESS];
} PciSlotInfo[MAX_PCI_CARDS];
} PCI_CARDS_FOUND_STRUC, *PPCI_CARDS_FOUND_STRUC;
//-------------------------------------------------------------------------
// D100_LIST_ENTRY
//-------------------------------------------------------------------------
typedef struct _D100_LIST_ENTRY {
LIST_ENTRY Link;
} D100_LIST_ENTRY, *PD100_LIST_ENTRY;
//-------------------------------------------------------------------------
// NON_TRANSMIT_CB -- Generic Non-Transmit Command Block
//-------------------------------------------------------------------------
typedef struct _NON_TRANSMIT_CB
{
union
{
MULTICAST_CB_STRUC Multicast;
CONFIG_CB_STRUC Config;
IA_CB_STRUC Setup;
DUMP_CB_STRUC Dump;
} NonTxCb;
} NON_TRANSMIT_CB, *PNON_TRANSMIT_CB;
//-------------------------------------------------------------------------
// COALESCE -- This structure describes a coalesce buffer resource
//-------------------------------------------------------------------------
typedef struct _COALESCE {
D100_LIST_ENTRY Link;
PVOID OwningTcb;
PUCHAR CoalesceBufferPtr;
ULONG CoalesceBufferPhys;
} COALESCE, *PCOALESCE;
//-------------------------------------------------------------------------
// D100SwTcb -- Software Transmit Control Block. This structure contains
// all of the variables that are related to a specific Transmit Control
// block (TCB)
//-------------------------------------------------------------------------
typedef struct _D100SwTcb {
// Link to the next SwTcb in the list
D100_LIST_ENTRY Link;
// The NDIS packet that this TCB is sending
PNDIS_PACKET Packet;
// physical and virtual pointers to the hardware TCB
PTXCB_STRUC Tcb;
ULONG TcbPhys;
// virtual pointer to the previous hardware TCB in the chain
PTXCB_STRUC PreviousTcb;
// Physical and virtual pointers to the TBD array for this TCB
PTBD_STRUC FirstTbd;
ULONG FirstTbdPhys;
// number of map registers used by this TCB
UINT MapsUsed;
// number of TBDs used by this TCB
UINT TbdsUsed;
// When a virtual buffer is decomposed into it's constituent
// physical vectors, each vector is stored here.
UINT NumPhysDesc;
NDIS_PHYSICAL_ADDRESS_UNIT PhysDesc[MAX_PHYS_DESC];
// If there are more physical segments then map registers,
// then use a coalesce buffer.
PCOALESCE Coalesce;
UINT CoalesceBufferLen;
// Describes the length of the packet as sent by the protocol.
UINT PacketLength;
// Pointer to the first buffer in the packet
PNDIS_BUFFER FirstBuffer;
// The number of buffers that the packet has
UINT BufferCount;
#if DBG
UINT TcbNum;
UINT BufferCountCheck;
UINT NumPhysDescCheck;
#endif
} D100SwTcb, *PD100SwTcb;
//-------------------------------------------------------------------------
// D100SwRfd
//
// In addition to the Receive Entry fields which the D100 defines, we need
// some additional fields for our own purposes. To ensure that these
// fields are properly aligned (and to ensure that the actual Receive
// Entry is properly aligned) we'll defined a Super Receive Entry.
// This structure will contain a "normal" Hardware Receive Entry (RFD) plus
// some additional fields.
//-------------------------------------------------------------------------
typedef struct _D100SwRfd {
D100_LIST_ENTRY Link;
#if DBG
UINT RfdNum;
#endif
//
// References an active chain of buffers when
// on the receive indication list.
//
volatile PRFD_STRUC Rfd; // ptr to hardware RFD
ULONG RfdPhys; // physical address of RFD
PNDIS_BUFFER ReceiveBuffer; // Pointer to Buffer
PNDIS_PACKET ReceivePacket; // Pointer to Packet
USHORT Status; // receive status (quick retrieval)
UINT FrameLength; // total size of receive frame
} D100SwRfd, *PD100SwRfd;
// supporting piece of ReceiveMemoryDescriptor
typedef struct _CMD {
ULONG VirtualAddress;
ULONG Size;
} CACHED_MEM_DESCRIPTOR, *PCACHED_MEM_DESCRIPTOR;
// supporting piece of ReceiveMemoryDescriptor
typedef struct _UCMD {
ULONG VirtualAddress;
NDIS_PHYSICAL_ADDRESS PhysicalAddress;
ULONG Size;
} UNCACHED_MEM_DESCRIPTOR, *PUNCACHED_MEM_DESCRIPTOR;
//-------------------------------------------------------------------------
// ReceiveMemoryDescriptor
//
// In order to manage receives in an environment where our receive
// buffer space might be growing, this structure was created to have
// a set of pointers that for each growth instance would allow us
// to monitor and free that growth area if need be.
// this structure is all just memory pointers and counters.
//-------------------------------------------------------------------------
typedef struct _RMD {
D100_LIST_ENTRY Link; // forward and backward links
CACHED_MEM_DESCRIPTOR CachedMem;
UNCACHED_MEM_DESCRIPTOR UnCachedMem;
UINT ActivePoolCount;
} ReceiveMemoryDescriptor, *PReceiveMemoryDescriptor;
//-------------------------------------------------------------------------
// This macro might be used to debug spinlock acquires and releases
// with the NdisAcquireSpinlock() and NdisReleaseSpinlock() call
// it aligns itself over 8 dwords, making reading in the debugger
// easy. Beware the NdisGetTime call sometimes returns the same
// value... when called in close proximity to each other...
// you might have a macro that replaced spinlock calls with some
// fill in of this structure and then acquire/release the spinlock
//-------------------------------------------------------------------------
#if DBG
typedef struct _D100SpinDebug
{
// 8 dwords total (hopefully) trying to debug a spin lock problem
USHORT action;
USHORT line;
ULONG file;
LARGE_INTEGER time;
// LONGLONG blank;
} D100SpinDebug, *PD100SpinDebug;
#endif
//-------------------------------------------------------------------------
// D100_ADAPTER
//
// The main Adapter structure definition. This structure has all fields
// relevant to the hardware.
//-------------------------------------------------------------------------
typedef struct _D100_ADAPTER
{
#if DBG
UINT Debug;
USHORT txsent;
USHORT txind;
UINT sdebugindex;
#define DBG_QUEUE_LEN 4095 //0xfff
UINT DbgIndex;
UCHAR DbgQueue[DBG_QUEUE_LEN];
UINT IndicateReceivePacketCounter;
UINT PacketsIndicated;
UINT ReceiveCompleteCounter;
#endif
// Holds the interrupt object for this adapter.
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