_strcmp.asm

很少见的源码公开的msc51和z80的c编译器。

;--------------------------------------------------------
; File Created by SDCC : FreeWare ANSI-C Compiler
; Version 2.3.0 Thu Sep 20 10:57:39 2001

;--------------------------------------------------------
	.module _strcmp
	
.flat24 on		; 24 bit flat addressing
dpx = 0x93		; dpx register unknown to assembler
dps = 0x86		; dps register unknown to assembler
dpl1 = 0x84		; dpl1 register unknown to assembler
dph1 = 0x85		; dph1 register unknown to assembler
dpx1 = 0x95		; dpx1 register unknown to assembler
ap = 0x9C		; ap register unknown to assembler
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
	.globl _strcmp_PARM_2
	.globl _strcmp
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
;--------------------------------------------------------
; special function bits 
;--------------------------------------------------------
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
	.area DSEG    (DATA)
;--------------------------------------------------------
; overlayable items in internal ram 
;--------------------------------------------------------
	.area OSEG    (OVR,DATA)
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
	.area ISEG    (DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
	.area BSEG    (BIT)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
	.area XSEG    (XDATA)
_strcmp_PARM_2::
	.ds 4
_strcmp_asrc_1_1::
	.ds 4
_strcmp_sloc0_1_0::
	.ds 1
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
	.area GSINIT  (CODE)
	.area GSFINAL (CODE)
	.area GSINIT  (CODE)
;--------------------------------------------------------
; Home
;--------------------------------------------------------
	.area HOME	 (CODE)
	.area CSEG    (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
	.area CSEG    (CODE)
;	_strcmp.c 31
;	genFunction 
;	-----------------------------------------
;	 function strcmp
;	-----------------------------------------
_strcmp:
	ar2 = 0x02
	ar3 = 0x03
	ar4 = 0x04
	ar5 = 0x05
	ar6 = 0x06
	ar7 = 0x07
	ar0 = 0x00
	ar1 = 0x01
;	_strcmp.c 58
;	genReceive 
	mov	r2,dpl
	mov	r3,dph
	mov	r4,dpx
	mov	r5,b
;	_strcmp.c 50
;	genAssign 
;	genAssign: resultIsFar = TRUE
	mov	dptr,#_strcmp_asrc_1_1
	mov	a,r2
	movx	@dptr,a
	inc	dptr
	mov	a,r3
	movx	@dptr,a
	inc	dptr
	mov	a,r4
	movx	@dptr,a
	inc	dptr
	mov	a,r5
	movx	@dptr,a
;	genAssign 
	mov	dptr,#_strcmp_PARM_2
;	genAssign: resultIsFar = FALSE
	movx	a,@dptr
	mov	r6,a
	inc	dptr
	movx	a,@dptr
	mov	r7,a
	inc	dptr
	movx	a,@dptr
	mov	r0,a
	inc	dptr
	movx	a,@dptr
	mov	r1,a
;	genLabel 
00102$:
;	genPointerGet 
;	genGenPointerGet 
	mov     dps, #0x01
	mov     dptr, #_strcmp_asrc_1_1
	movx	a,@dptr
	dec	dps
	mov	dpl,a
	inc	dps
	inc	dptr
	movx	a,@dptr
	dec	dps
	mov	dph,a
	inc	dps
	inc	dptr
	movx	a,@dptr
	dec	dps
	mov	dpx,a
	inc	dps
	inc	dptr
	movx	a,@dptr
	mov	b,a
; Peephole 220a removed bogus DPS set
	mov	dps, #0x01
	mov	dptr, #_strcmp_sloc0_1_0
	dec	dps
	lcall	__gptrget
	mov	dps, #0x01
	movx	@dptr,a
	mov	dps, #0x00
;	genPointerGet 
;	genGenPointerGet 
	mov	dpl,r6
	mov	dph,r7
	mov	dpx,r0
	mov	b,r1
	lcall	__gptrget
	mov	r2,a
;	genMinus 
	mov	dptr,#_strcmp_sloc0_1_0
	clr	c
	movx	a,@dptr
	subb	a,r2
;	genCast 
; Peephole 166   removed redundant mov
	mov  r3,a
	mov  ar4,r3 
	rlc	a
	subb	a,acc
	mov	r5,a
;	genIfx 
	mov	a,r3
;	genIfxJump 
; Peephole 109   removed ljmp by inverse jump logic
	jnz  00104$
00117$:
;	genIfx 
	mov	a,r2
;	genIfxJump 
; Peephole 110   removed ljmp by inverse jump logic
	jz  00104$
00118$:
;	_strcmp.c 51
;	genPlus 
	mov	dptr,#_strcmp_asrc_1_1
;	Swapped plus args.
	movx	a,@dptr
	add	a,#0x01
	movx	@dptr,a
	inc	dptr
	movx	a,@dptr
	addc	a,#0x00
	movx	@dptr,a
	inc	dptr
	movx	a,@dptr
	addc	a,#0x00
	movx	@dptr,a
	inc	dptr
	movx	a,@dptr
	movx	@dptr,a
;	genPlus 
	inc	r6
	cjne	r6,#0x00,00119$
	inc	r7
	cjne	r7,#0x00,00119$
	inc	r0
00119$:
;	did genPlusIncr
;	genGoto 
	ljmp	00102$
;	genLabel 
00104$:
;	_strcmp.c 53
;	genCmpLt 
;	genCmp
	mov	a,r5
;	genIfxJump 
; Peephole 111   removed ljmp by inverse jump logic
	jnb  acc.7,00108$
00120$:
;	_strcmp.c 54
;	genAssign 
;	genAssign: resultIsFar = TRUE
	mov	r4,#0xFF
	mov	r5,#0xFF
;	genGoto 
;	genLabel 
; Peephole 132   changed ljmp to sjmp
	sjmp 00109$
00108$:
;	_strcmp.c 55
;	genCmpGt 
;	genCmp
	clr	c
;	genCmp #1: 1/1/0
; Peephole 180   changed mov to clr
	clr  a
;	genCmp #2
;	genCmp #4
;	genCmp #4.2
	subb	a,r4
;	genCmp #1: 0/1/1
;	genCmp #2
;	genCmp #3
; Peephole 159   avoided xrl during execution
	mov  a,#(0x00 ^ 0x80)
;	genCmp #3.2
	mov	b,r5
	xrl	b,#0x80
	subb	a,b
;	genIfxJump 
; Peephole 108   removed ljmp by inverse jump logic
	jnc  00109$
00121$:
;	_strcmp.c 56
;	genAssign 
;	genAssign: resultIsFar = TRUE
	mov	r4,#0x01
	mov	r5,#0x00
;	genLabel 
00109$:
;	_strcmp.c 58
;	genRet 
	mov	dpl,r4
	mov	dph,r5
;	genLabel 
00110$:
;	genEndFunction 
	ret
	.area CSEG    (CODE)