_strncat.asm

很少见的源码公开的msc51和z80的c编译器。

;--------------------------------------------------------
; File Created by SDCC : FreeWare ANSI-C Compiler
; Version 2.3.0 Thu Sep 20 10:57:17 2001

;--------------------------------------------------------
	.module _strncat
	
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
	.globl _strncat_PARM_3
	.globl _strncat_PARM_2
	.globl _strncat
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
;--------------------------------------------------------
; special function bits 
;--------------------------------------------------------
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
	.area DSEG    (DATA)
;--------------------------------------------------------
; overlayable items in internal ram 
;--------------------------------------------------------
	.area _DUMMY
	.area	OSEG    (OVR,DATA)
_strncat_PARM_2::
	.ds 3
_strncat_PARM_3::
	.ds 2
_strncat_front_1_1::
	.ds 3
_strncat_start_1_1::
	.ds 3
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
	.area ISEG    (DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
	.area BSEG    (BIT)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
	.area XSEG    (XDATA)
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
	.area GSINIT  (CODE)
	.area GSFINAL (CODE)
	.area GSINIT  (CODE)
;--------------------------------------------------------
; Home
;--------------------------------------------------------
	.area HOME	 (CODE)
	.area CSEG    (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
	.area CSEG    (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function 'strncat'
;------------------------------------------------------------
;	_strncat.c 27
;	-----------------------------------------
;	 function strncat
;	-----------------------------------------
_strncat:
	ar2 = 0x02
	ar3 = 0x03
	ar4 = 0x04
	ar5 = 0x05
	ar6 = 0x06
	ar7 = 0x07
	ar0 = 0x00
	ar1 = 0x01
;	_strncat.c 44
	mov	_strncat_front_1_1,dpl
	mov	(_strncat_front_1_1 + 1),dph
	mov	(_strncat_front_1_1 + 2),b
;	_strncat.c 33
	mov	_strncat_start_1_1,_strncat_front_1_1
	mov	(_strncat_start_1_1 + 1),(_strncat_front_1_1 + 1)
	mov	(_strncat_start_1_1 + 2),(_strncat_front_1_1 + 2)
;	_strncat.c 35
	mov	r0,_strncat_front_1_1
	mov	r1,(_strncat_front_1_1 + 1)
	mov	r5,(_strncat_front_1_1 + 2)
00101$:
	mov	dpl,r0
	mov	dph,r1
	mov	b,r5
	lcall	__gptrget
	mov	r6,a
	inc	dptr
	mov	r0,dpl
	mov	r1,dph
	mov	a,r6
; Peephole 109   removed ljmp by inverse jump logic
	jnz  00101$
00116$:
;	_strncat.c 37
	mov	a,r0
	add	a,#0xff
	mov	_strncat_front_1_1,a
	mov	a,r1
	addc	a,#0xff
	mov	(_strncat_front_1_1 + 1),a
	mov	(_strncat_front_1_1 + 2),r5
;	_strncat.c 39
	mov	r0,_strncat_front_1_1
	mov	r1,(_strncat_front_1_1 + 1)
	mov	r5,(_strncat_front_1_1 + 2)
	mov	r6,_strncat_PARM_3
	mov	r7,(_strncat_PARM_3 + 1)
00106$:
	mov	ar2,r6
	mov	ar3,r7
	dec	r6
	cjne	r6,#0xff,00117$
	dec	r7
00117$:
	mov	a,r2
	orl	a,r3
; Peephole 110   removed ljmp by inverse jump logic
	jz  00108$
00118$:
;	_strncat.c 40
	mov	dpl,_strncat_PARM_2
	mov	dph,(_strncat_PARM_2 + 1)
	mov	b,(_strncat_PARM_2 + 2)
	lcall	__gptrget
	mov	r2,a
	inc	dptr
	mov	_strncat_PARM_2,dpl
	mov	(_strncat_PARM_2 + 1),dph
	mov	dpl,r0
	mov	dph,r1
	mov	b,r5
	mov	a,r2
	lcall	__gptrput
	inc	dptr
	mov	r0,dpl
	mov	r1,dph
	mov	_strncat_front_1_1,r0
	mov	(_strncat_front_1_1 + 1),r1
	mov	(_strncat_front_1_1 + 2),r5
	mov	a,r2
; Peephole 109   removed ljmp by inverse jump logic
	jnz  00106$
00119$:
;	_strncat.c 41
	mov	dpl,_strncat_start_1_1
	mov	dph,(_strncat_start_1_1 + 1)
	mov	b,(_strncat_start_1_1 + 2)
; Peephole 132   changed ljmp to sjmp
	sjmp 00109$
00108$:
;	_strncat.c 43
	mov	dpl,_strncat_front_1_1
	mov	dph,(_strncat_front_1_1 + 1)
	mov	b,(_strncat_front_1_1 + 2)
; Peephole 180   changed mov to clr
	clr  a
	lcall	__gptrput
;	_strncat.c 44
	mov	dpl,_strncat_start_1_1
	mov	dph,(_strncat_start_1_1 + 1)
	mov	b,(_strncat_start_1_1 + 2)
00109$:
	ret
	.area CSEG    (CODE)