_fsdiv.asm

很少见的源码公开的msc51和z80的c编译器。

;--------------------------------------------------------
; File Created by SDCC : FreeWare ANSI-C Compiler
; Version 2.3.0 Thu Sep 20 10:57:13 2001

;--------------------------------------------------------
	.module _fsdiv
	
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
	.globl ___fsdiv_PARM_2
	.globl ___fsdiv
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
;--------------------------------------------------------
; special function bits 
;--------------------------------------------------------
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
	.area DSEG    (DATA)
;--------------------------------------------------------
; overlayable items in internal ram 
;--------------------------------------------------------
	.area _DUMMY
	.area	OSEG    (OVR,DATA)
___fsdiv_PARM_2::
	.ds 4
___fsdiv_fl1_1_1::
	.ds 4
___fsdiv_fl2_1_1::
	.ds 4
___fsdiv_result_1_1::
	.ds 4
___fsdiv_mask_1_1::
	.ds 4
___fsdiv_mant1_1_1::
	.ds 4
___fsdiv_mant2_1_1::
	.ds 4
___fsdiv_exp_1_1::
	.ds 2
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
	.area ISEG    (DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
	.area BSEG    (BIT)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
	.area XSEG    (XDATA)
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
	.area GSINIT  (CODE)
	.area GSFINAL (CODE)
	.area GSINIT  (CODE)
;--------------------------------------------------------
; Home
;--------------------------------------------------------
	.area HOME	 (CODE)
	.area CSEG    (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
	.area CSEG    (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function '__fsdiv'
;------------------------------------------------------------
;	_fsdiv.c 73
;	-----------------------------------------
;	 function __fsdiv
;	-----------------------------------------
___fsdiv:
	ar2 = 0x02
	ar3 = 0x03
	ar4 = 0x04
	ar5 = 0x05
	ar6 = 0x06
	ar7 = 0x07
	ar0 = 0x00
	ar1 = 0x01
;	_fsdiv.c 138
	mov	r2,dpl
	mov	r3,dph
	mov	r4,b
	mov	r5,a
;	_fsdiv.c 82
	mov	___fsdiv_fl1_1_1,r2
	mov	(___fsdiv_fl1_1_1 + 1),r3
	mov	(___fsdiv_fl1_1_1 + 2),r4
	mov	(___fsdiv_fl1_1_1 + 3),r5
;	_fsdiv.c 83
	mov	___fsdiv_fl2_1_1,___fsdiv_PARM_2
	mov	(___fsdiv_fl2_1_1 + 1),(___fsdiv_PARM_2 + 1)
	mov	(___fsdiv_fl2_1_1 + 2),(___fsdiv_PARM_2 + 2)
	mov	(___fsdiv_fl2_1_1 + 3),(___fsdiv_PARM_2 + 3)
;	_fsdiv.c 86
	mov	r2,(___fsdiv_fl1_1_1 + 2)
	mov	a,(___fsdiv_fl1_1_1 + 3)
	mov	c,acc.7
	xch	a,r2
	rlc	a
	xch	a,r2
	rlc	a
	xch	a,r2
	anl	a,#0x01
	mov	r3,a
	mov	r4,#0x00
	mov	r5,#0x00
	mov	r3,#0x00
	mov	r4,#0x00
	mov	r5,#0x00
	mov	___fsdiv_exp_1_1,r2
	mov	(___fsdiv_exp_1_1 + 1),r3
;	_fsdiv.c 87
	mov	r2,(___fsdiv_fl2_1_1 + 2)
	mov	a,(___fsdiv_fl2_1_1 + 3)
	mov	c,acc.7
	xch	a,r2
	rlc	a
	xch	a,r2
	rlc	a
	xch	a,r2
	anl	a,#0x01
	mov	r3,a
	mov	r4,#0x00
	mov	r5,#0x00
	mov	r3,#0x00
	mov	r4,#0x00
	mov	r5,#0x00
	mov	r6,___fsdiv_exp_1_1
	mov	r7,(___fsdiv_exp_1_1 + 1)
	mov	a,(___fsdiv_exp_1_1 + 1)
	rlc	a
	subb	a,acc
	mov	r0,a
	mov	r1,a
	clr	c
	mov	a,r6
	subb	a,r2
	mov	r2,a
	mov	a,r7
	subb	a,r3
	mov	r3,a
	mov	a,r0
	subb	a,r4
	mov	r4,a
	mov	a,r1
	subb	a,r5
	mov	r5,a
	mov	___fsdiv_exp_1_1,r2
	mov	(___fsdiv_exp_1_1 + 1),r3
;	_fsdiv.c 88
	mov	a,#0x7E
	add	a,___fsdiv_exp_1_1
	mov	___fsdiv_exp_1_1,a
; Peephole 180   changed mov to clr
	clr  a
	addc	a,(___fsdiv_exp_1_1 + 1)
	mov	(___fsdiv_exp_1_1 + 1),a
;	_fsdiv.c 91
	mov	a,(___fsdiv_fl1_1_1 + 3)
	rl	a
	anl	a,#0x01
	mov	r2,a
	mov	a,(___fsdiv_fl2_1_1 + 3)
	rl	a
	anl	a,#0x01
; Peephole 105   removed redundant mov
	mov  r3,a
	xrl	ar2,a
;	_fsdiv.c 94
	mov	a,___fsdiv_fl2_1_1
	orl	a,(___fsdiv_fl2_1_1 + 1)
	orl	a,(___fsdiv_fl2_1_1 + 2)
	orl	a,(___fsdiv_fl2_1_1 + 3)
; Peephole 109   removed ljmp by inverse jump logic
	jnz  00102$
00120$:
;	_fsdiv.c 96
; Peephole 181   used 16 bit load of dptr
	mov  dptr,#0x0000
	mov	b,#0x80
	mov	a,#0xBF
	ljmp	00112$
00102$:
;	_fsdiv.c 99
	mov	a,___fsdiv_fl1_1_1
	orl	a,(___fsdiv_fl1_1_1 + 1)
	orl	a,(___fsdiv_fl1_1_1 + 2)
	orl	a,(___fsdiv_fl1_1_1 + 3)
; Peephole 109   removed ljmp by inverse jump logic
	jnz  00104$
00121$:
;	_fsdiv.c 100
; Peephole 3.a   changed mov to clr
; Peephole 3.b   changed mov to clr
; Peephole 3.b   changed mov to clr
	clr  a
	mov  dpl,a
	mov  dph,a
	mov  b,a
	ljmp	00112$
00104$:
;	_fsdiv.c 103
	mov	r3,___fsdiv_fl1_1_1
	mov	r4,(___fsdiv_fl1_1_1 + 1)
	mov	r5,(___fsdiv_fl1_1_1 + 2)
	mov	r6,(___fsdiv_fl1_1_1 + 3)
	anl	ar5,#0x7F
	mov	r6,#0x00
	mov	___fsdiv_mant1_1_1,r3
	mov	(___fsdiv_mant1_1_1 + 1),r4
	mov	a,#0x80
	orl	a,r5
	mov	(___fsdiv_mant1_1_1 + 2),a
	mov	(___fsdiv_mant1_1_1 + 3),r6
;	_fsdiv.c 104
	mov	r3,___fsdiv_fl2_1_1
	mov	r4,(___fsdiv_fl2_1_1 + 1)
	mov	r5,(___fsdiv_fl2_1_1 + 2)
	mov	r6,(___fsdiv_fl2_1_1 + 3)
	anl	ar5,#0x7F
	mov	r6,#0x00
	mov	___fsdiv_mant2_1_1,r3
	mov	(___fsdiv_mant2_1_1 + 1),r4
	mov	a,#0x80
	orl	a,r5
	mov	(___fsdiv_mant2_1_1 + 2),a
	mov	(___fsdiv_mant2_1_1 + 3),r6
;	_fsdiv.c 107
	clr	c
	mov	a,___fsdiv_mant1_1_1
	subb	a,___fsdiv_mant2_1_1
	mov	a,(___fsdiv_mant1_1_1 + 1)
	subb	a,(___fsdiv_mant2_1_1 + 1)
	mov	a,(___fsdiv_mant1_1_1 + 2)
	subb	a,(___fsdiv_mant2_1_1 + 2)
	mov	a,(___fsdiv_mant1_1_1 + 3)
	xrl	a,#0x80
	mov	b,(___fsdiv_mant2_1_1 + 3)
	xrl	b,#0x80
	subb	a,b
; Peephole 108   removed ljmp by inverse jump logic
	jnc  00106$
00122$:
;	_fsdiv.c 109
	mov	a,___fsdiv_mant1_1_1
	add	a,acc
	mov	___fsdiv_mant1_1_1,a
	mov	a,(___fsdiv_mant1_1_1 + 1)
	rlc	a
	mov	(___fsdiv_mant1_1_1 + 1),a
	mov	a,(___fsdiv_mant1_1_1 + 2)
	rlc	a
	mov	(___fsdiv_mant1_1_1 + 2),a
	mov	a,(___fsdiv_mant1_1_1 + 3)
	rlc	a
	mov	(___fsdiv_mant1_1_1 + 3),a
;	_fsdiv.c 110
	dec	___fsdiv_exp_1_1
	mov	a,#0xff
	cjne	a,___fsdiv_exp_1_1,00123$
	dec	(___fsdiv_exp_1_1 + 1)
00123$:
00106$:
;	_fsdiv.c 114
	mov	___fsdiv_mask_1_1,#0x00
	mov	(___fsdiv_mask_1_1 + 1),#0x00
	mov	(___fsdiv_mask_1_1 + 2),#0x00
	mov	(___fsdiv_mask_1_1 + 3),#0x01
;	_fsdiv.c 115
	clr	a
	mov	(___fsdiv_result_1_1 + 3),a
	mov	(___fsdiv_result_1_1 + 2),a
	mov	(___fsdiv_result_1_1 + 1),a
	mov	___fsdiv_result_1_1,a
;	_fsdiv.c 116
00109$:
	mov	a,___fsdiv_mask_1_1
	orl	a,(___fsdiv_mask_1_1 + 1)
	orl	a,(___fsdiv_mask_1_1 + 2)
	orl	a,(___fsdiv_mask_1_1 + 3)
	jnz	00124$
	ljmp	00111$
00124$:
;	_fsdiv.c 118
	clr	c
	mov	a,___fsdiv_mant1_1_1
	subb	a,___fsdiv_mant2_1_1
	mov	a,(___fsdiv_mant1_1_1 + 1)
	subb	a,(___fsdiv_mant2_1_1 + 1)
	mov	a,(___fsdiv_mant1_1_1 + 2)
	subb	a,(___fsdiv_mant2_1_1 + 2)
	mov	a,(___fsdiv_mant1_1_1 + 3)
	xrl	a,#0x80
	mov	b,(___fsdiv_mant2_1_1 + 3)
	xrl	b,#0x80
	subb	a,b
; Peephole 132   changed ljmp to sjmp
; Peephole 160   removed sjmp by inverse jump logic
	jc   00108$
00125$:
;	_fsdiv.c 120
	mov	r3,___fsdiv_result_1_1
	mov	r4,(___fsdiv_result_1_1 + 1)
	mov	r5,(___fsdiv_result_1_1 + 2)
	mov	r6,(___fsdiv_result_1_1 + 3)
	mov	a,___fsdiv_mask_1_1
	orl	a,r3
	mov	___fsdiv_result_1_1,a
	mov	a,(___fsdiv_mask_1_1 + 1)
	orl	a,r4
	mov	(___fsdiv_result_1_1 + 1),a
	mov	a,(___fsdiv_mask_1_1 + 2)
	orl	a,r5
	mov	(___fsdiv_result_1_1 + 2),a
	mov	a,(___fsdiv_mask_1_1 + 3)
	orl	a,r6
	mov	(___fsdiv_result_1_1 + 3),a
;	_fsdiv.c 121
	clr	c
	mov	a,___fsdiv_mant1_1_1
	subb	a,___fsdiv_mant2_1_1
	mov	___fsdiv_mant1_1_1,a
	mov	a,(___fsdiv_mant1_1_1 + 1)
	subb	a,(___fsdiv_mant2_1_1 + 1)
	mov	(___fsdiv_mant1_1_1 + 1),a
	mov	a,(___fsdiv_mant1_1_1 + 2)
	subb	a,(___fsdiv_mant2_1_1 + 2)
	mov	(___fsdiv_mant1_1_1 + 2),a
	mov	a,(___fsdiv_mant1_1_1 + 3)
	subb	a,(___fsdiv_mant2_1_1 + 3)
	mov	(___fsdiv_mant1_1_1 + 3),a
00108$:
;	_fsdiv.c 123
	mov	a,___fsdiv_mant1_1_1
	add	a,acc
	mov	___fsdiv_mant1_1_1,a
	mov	a,(___fsdiv_mant1_1_1 + 1)
	rlc	a
	mov	(___fsdiv_mant1_1_1 + 1),a
	mov	a,(___fsdiv_mant1_1_1 + 2)
	rlc	a
	mov	(___fsdiv_mant1_1_1 + 2),a
	mov	a,(___fsdiv_mant1_1_1 + 3)
	rlc	a
	mov	(___fsdiv_mant1_1_1 + 3),a
;	_fsdiv.c 124
	mov	a,(___fsdiv_mask_1_1 + 3)
	clr	c
	rrc	a
	mov	(___fsdiv_mask_1_1 + 3),a
	mov	a,(___fsdiv_mask_1_1 + 2)
	rrc	a
	mov	(___fsdiv_mask_1_1 + 2),a
	mov	a,(___fsdiv_mask_1_1 + 1)
	rrc	a
	mov	(___fsdiv_mask_1_1 + 1),a
	mov	a,___fsdiv_mask_1_1
	rrc	a
	mov	___fsdiv_mask_1_1,a
	ljmp	00109$
00111$:
;	_fsdiv.c 128
	inc	___fsdiv_result_1_1
	clr	a
	cjne	a,___fsdiv_result_1_1,00126$
	inc	(___fsdiv_result_1_1 + 1)
	cjne	a,(___fsdiv_result_1_1 + 1),00126$
	inc	(___fsdiv_result_1_1 + 2)
	cjne	a,(___fsdiv_result_1_1 + 2),00126$
	inc	(___fsdiv_result_1_1 + 3)
00126$:
;	_fsdiv.c 131
	inc	___fsdiv_exp_1_1
	clr	a
	cjne	a,___fsdiv_exp_1_1,00127$
	inc	(___fsdiv_exp_1_1 + 1)
00127$:
;	_fsdiv.c 132
	mov	a,(___fsdiv_result_1_1 + 3)
	mov	c,acc.7
	rrc	a
	mov	(___fsdiv_result_1_1 + 3),a
	mov	a,(___fsdiv_result_1_1 + 2)
	rrc	a
	mov	(___fsdiv_result_1_1 + 2),a
	mov	a,(___fsdiv_result_1_1 + 1)
	rrc	a
	mov	(___fsdiv_result_1_1 + 1),a
	mov	a,___fsdiv_result_1_1
	rrc	a
	mov	___fsdiv_result_1_1,a
;	_fsdiv.c 134
	mov	r3,___fsdiv_result_1_1
	mov	r4,(___fsdiv_result_1_1 + 1)
	mov	r5,(___fsdiv_result_1_1 + 2)
	mov	r6,(___fsdiv_result_1_1 + 3)
	mov	___fsdiv_result_1_1,r3
	mov	(___fsdiv_result_1_1 + 1),r4
	mov	a,#0x7F
	anl	a,r5
	mov	(___fsdiv_result_1_1 + 2),a
	mov	(___fsdiv_result_1_1 + 3),r6
;	_fsdiv.c 137
	mov	r3,___fsdiv_exp_1_1
	mov	r4,(___fsdiv_exp_1_1 + 1)
	mov	a,(___fsdiv_exp_1_1 + 1)
	rlc	a
	subb	a,acc
	mov	r5,a
	mov	r6,a
	mov	ar5,r3
	mov	a,r4
	anl	a,#0x01
	mov	c,acc.0
	xch	a,r5
	rrc	a
	xch	a,r5
	rrc	a
	xch	a,r5
	mov	r6,a
; Peephole 3.c   changed mov to clr
	clr  a
	mov  r4,a
	mov  r3,a
	mov  a,r2
	rlc	a
	subb	a,acc
	mov	r7,a
	mov	r0,a
	mov	r1,a
	mov	a,r2
	orl	ar3,a
	mov	a,r7
	orl	ar4,a
	mov	a,r0
	orl	ar5,a
	mov	a,r1
	orl	ar6,a
	mov	r2,___fsdiv_result_1_1
	mov	r7,(___fsdiv_result_1_1 + 1)
	mov	r0,(___fsdiv_result_1_1 + 2)
	mov	r1,(___fsdiv_result_1_1 + 3)
	mov	a,r2
	orl	ar3,a
	mov	a,r7
	orl	ar4,a
	mov	a,r0
	orl	ar5,a
	mov	a,r1
	orl	ar6,a
	mov	___fsdiv_fl1_1_1,r3
	mov	(___fsdiv_fl1_1_1 + 1),r4
	mov	(___fsdiv_fl1_1_1 + 2),r5
	mov	(___fsdiv_fl1_1_1 + 3),r6
;	_fsdiv.c 138
	mov	dpl,___fsdiv_fl1_1_1
	mov	dph,(___fsdiv_fl1_1_1 + 1)
	mov	b,(___fsdiv_fl1_1_1 + 2)
	mov	a,(___fsdiv_fl1_1_1 + 3)
00112$:
	ret
	.area CSEG    (CODE)