_divulong.asm

很少见的源码公开的msc51和z80的c编译器。

;--------------------------------------------------------
; File Created by SDCC : FreeWare ANSI-C Compiler
; Version 2.3.0 Thu Sep 20 10:57:12 2001

;--------------------------------------------------------
	.module _divulong
	
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
	.globl __divulong_PARM_2
	.globl __divulong
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
;--------------------------------------------------------
; special function bits 
;--------------------------------------------------------
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
	.area DSEG    (DATA)
;--------------------------------------------------------
; overlayable items in internal ram 
;--------------------------------------------------------
	.area _DUMMY
	.area	OSEG    (OVR,DATA)
__divulong_PARM_2::
	.ds 4
__divulong_count_1_1::
	.ds 1
__divulong_c_1_1::
	.ds 1
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
	.area ISEG    (DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
	.area BSEG    (BIT)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
	.area XSEG    (XDATA)
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
	.area GSINIT  (CODE)
	.area GSFINAL (CODE)
	.area GSINIT  (CODE)
;--------------------------------------------------------
; Home
;--------------------------------------------------------
	.area HOME	 (CODE)
	.area CSEG    (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
	.area CSEG    (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function '_divulong'
;------------------------------------------------------------
;	_divulong.c 27
;	-----------------------------------------
;	 function _divulong
;	-----------------------------------------
__divulong:
	ar2 = 0x02
	ar3 = 0x03
	ar4 = 0x04
	ar5 = 0x05
	ar6 = 0x06
	ar7 = 0x07
	ar0 = 0x00
	ar1 = 0x01
;	_divulong.c 48
	mov	r2,dpl
	mov	r3,dph
	mov	r4,b
	mov	r5,a
;	_divulong.c 29
	mov	r6,#0x00
	mov	r7,#0x00
	mov	r0,#0x00
	mov	r1,#0x00
;	_divulong.c 33
	mov	__divulong_count_1_1,#0x20
00105$:
;	_divulong.c 35
	mov	a,r5
	rl	a
	anl	a,#0x01
	mov	__divulong_c_1_1,a
;	_divulong.c 36
	mov	a,r2
	add	a,acc
	mov	r2,a
	mov	a,r3
	rlc	a
	mov	r3,a
	mov	a,r4
	rlc	a
	mov	r4,a
	mov	a,r5
	rlc	a
	mov	r5,a
;	_divulong.c 37
	mov	a,r6
	add	a,acc
	mov	r6,a
	mov	a,r7
	rlc	a
	mov	r7,a
	mov	a,r0
	rlc	a
	mov	r0,a
	mov	a,r1
	rlc	a
	mov	r1,a
;	_divulong.c 38
	mov	a,__divulong_c_1_1
; Peephole 110   removed ljmp by inverse jump logic
	jz  00102$
00114$:
;	_divulong.c 39
	orl	ar6,#0x01
00102$:
;	_divulong.c 41
	clr	c
	mov	a,r6
	subb	a,__divulong_PARM_2
	mov	a,r7
	subb	a,(__divulong_PARM_2 + 1)
	mov	a,r0
	subb	a,(__divulong_PARM_2 + 2)
	mov	a,r1
	subb	a,(__divulong_PARM_2 + 3)
; Peephole 132   changed ljmp to sjmp
; Peephole 160   removed sjmp by inverse jump logic
	jc   00106$
00115$:
;	_divulong.c 42
	clr	c
	mov	a,r6
	subb	a,__divulong_PARM_2
	mov	r6,a
	mov	a,r7
	subb	a,(__divulong_PARM_2 + 1)
	mov	r7,a
	mov	a,r0
	subb	a,(__divulong_PARM_2 + 2)
	mov	r0,a
	mov	a,r1
	subb	a,(__divulong_PARM_2 + 3)
	mov	r1,a
;	_divulong.c 44
	orl	ar2,#0x01
00106$:
;	_divulong.c 46
	djnz	__divulong_count_1_1,00116$
	sjmp	00117$
00116$:
	ljmp	00105$
00117$:
;	_divulong.c 48
	mov	dpl,r2
	mov	dph,r3
	mov	b,r4
	mov	a,r5
00108$:
	ret
	.area CSEG    (CODE)