map72324.h

how to use st mcu c langugue,cosmic

/********************** (c) 2002  ST Microelectronics **************************

PROJECT  : ST72324
COMPILER : ST7 HICROSS C (HIWARE)

MODULE  :  map72324.c
VERSION :  V 1.0

CREATION DATE :  26/10/02

AUTHOR : CMG 8-bit Micro Application Team 

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DESCRIPTION : ST72324 Hardware Registers Mapping.

              This file contains the description of the hardware registers of
              the ST72324 microcontroller.
              
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MODIFICATIONS :

******************************************************************************/
#ifndef MAP72324_H
#define MAP72324_H

/* ***************************************
   Peripherals Registers Definition
   *************************************** */
typedef struct
{unsigned B0:1;
 unsigned B1:1;
 unsigned B2:1;
 unsigned B3:1;
 unsigned B4:1;
 unsigned B5:1;
 unsigned B6:1;
 unsigned B7:1;
}bit_def;
/* I/O ports registers */ 
@tiny  volatile bit_def	      PADR     @0x00;	/* Port A Data Register */
@tiny  volatile unsigned char PADDR    @0x01;	/* Port A Data Direction */
@tiny  volatile unsigned char PAOR     @0x02;	/* Port A Option register */
@tiny  volatile bit_def	      PBDR     @0x03;	/* Port B Data Register */
@tiny  volatile unsigned char PBDDR    @0x04;	/* Port B Data Direction */
volatile unsigned char        PBOR     @0x05;	/* Port B Option Register */
@tiny  volatile bit_def	      PCDR     @0x06;	/* Port C Data Register */
@tiny  volatile unsigned char PCDDR    @0x07;	/* Port C Data Direction */
@tiny  volatile unsigned char PCOR     @0x08;	/* Port C Option Register */
@tiny  volatile unsigned char PDDR     @0x09;	/* Port D Data Register */
@tiny  volatile unsigned char PDDDR    @0x0a;	/* Port D Data Direction */
@tiny  volatile unsigned char PDOR     @0x0b;	/* Port D Option Register */
@tiny  volatile unsigned char PEDR     @0x0c;	/* Port E Data Register */
@tiny  volatile unsigned char PEDDR    @0x0d;	/* Port E Data Direction */
@tiny  volatile unsigned char PEOR     @0x0e;	/* Port E Option Register */
@tiny  volatile bit_def			 PFDR     @0x0f;	/* Port F Data Register */
@tiny  volatile unsigned char PFDDR    @0x10;	/* Port F Data Direction */
@tiny  volatile unsigned char PFOR     @0x11;	/* Port F Option Register */

/*	SPI section */
@tiny  volatile unsigned char SPIDR    @0x21;	/* SPI Data Register */
@tiny  volatile unsigned char SPICR    @0x22;	/* SPI Control Register */
@tiny  volatile unsigned char SPICSR   @0x23;	/* SPI Control/Status Register */

/*	ITC section */
@tiny  volatile unsigned char ITSPR0   @0x24;	/* Interrupt Software Priority Reg 0 */
@tiny  volatile unsigned char ITSPR1   @0x25;	/* Interrupt Software Priority Reg 1 */
@tiny  volatile unsigned char ITSPR2   @0x26;	/* Interrupt Software Priority Reg 2 */
@tiny  volatile unsigned char ITSPR3   @0x27;	/* Interrupt Software Priority Reg 3 */
@tiny  volatile unsigned char EICR     @0x28;	/* External Interrupt Control Reg */

/*	SYSTEM section */
@tiny  volatile unsigned char FCSR     @0x29;	/* Flash Control/Status Register */
@tiny  volatile unsigned char WDGCR    @0x2a;	/* Watchdog Control Register */
@tiny  volatile unsigned char SICSR    @0x2b;	/* System Integrity Control/Status */

/*	MCC section */
@tiny  volatile unsigned char MCCSR    @0x2c;	/* Main Clock Control/Status Reg */
@tiny  volatile unsigned char MCCBCR   @0x2d;	/* Main Clock Beep Control Register */

/*	TIMER A section */
@tiny  volatile unsigned char TACR2    @0x31;	/* Control Register 2 */
@tiny  volatile unsigned char TACR1    @0x32;	/* Control Register 1 */
@tiny  volatile unsigned char TACSR    @0x33;	/* Control/Status Register */
@tiny  volatile unsigned char TAIC1HR  @0x34;	/* Input Capture 1 High */
@tiny  volatile unsigned char TAIC1LR  @0x35;	/* Input Capture 1 Low */
@tiny  volatile unsigned char TAOC1HR  @0x36;	/* Output Compare 1 High */
@tiny  volatile unsigned char TAOC1LR  @0x37;	/* Output Compare 1 Low */
@tiny  volatile unsigned char TAOC1R  @0x36;

@tiny  volatile unsigned char TACHR    @0x38;	/* Counter High */
@tiny  volatile unsigned char TACLR    @0x39;	/* Counter Low */
@tiny  volatile unsigned char TAACHR   @0x3a;	/* Alternate Counter High */
@tiny  volatile unsigned char TAACLR   @0x3b;	/* Alternate Counter Low */
@tiny  volatile unsigned char TAIC2HR  @0x3c;	/* Input Capture 2 High */
@tiny  volatile unsigned char TAIC2LR  @0x3d;	/* Input Capture 2 Low */
@tiny  volatile unsigned char TAOC2HR  @0x3e;	/* Output Compare 2 High */
@tiny  volatile unsigned char TAOC2LR  @0x3f;	/* Output Compare 2 Low */
@tiny  volatile unsigned char TAOC2R  @0x3e;
/*	TIMER B section */
@tiny  volatile unsigned char TBCR2    @0x41;	/* Control Register 2 */
@tiny  volatile unsigned char TBCR1    @0x42;	/* Control Register 1 */
@tiny  volatile unsigned char TBCSR    @0x43;	/* Control/Status Register */
@tiny  volatile unsigned char TBIC1HR  @0x44;	/* Input Capture 1 High */
@tiny  volatile unsigned char TBIC1LR  @0x45;	/* Input Capture 1 Low */
@tiny  volatile unsigned char TBOC1HR  @0x46;	/* Output Compare 1 High */
@tiny  volatile unsigned char TBOC1LR  @0x47;	/* Output Compare 1 Low */
@tiny  volatile unsigned char TBOC1R  @0x46;

@tiny  volatile unsigned char TBCHR    @0x48;	/* Counter High */
@tiny  volatile unsigned char TBCLR    @0x49;	/* Counter Low */
@tiny  volatile unsigned char TBACHR   @0x4a;	/* Alternate Counter High */
@tiny  volatile unsigned char TBACLR   @0x4b;	/* Alternate Counter Low */
@tiny  volatile unsigned char TBIC2HR  @0x4c;	/* Input Capture 2 High */
@tiny  volatile unsigned char TBIC2LR  @0x4d;	/* Input Capture 2 Low */
@tiny  volatile unsigned char TBOC2HR  @0x4e;	/* Output Compare 2 High */
@tiny  volatile unsigned char TBOC2LR  @0x4f;	/* Output Compare 2 Low */
@tiny  volatile unsigned char TBOC2R  @0x4e;
/*	SCI section */
@tiny  volatile unsigned char SCISR    @0x50;	/* SCI Status Register */
@tiny  volatile unsigned char SCIDR    @0x51;	/* SCI Data Register */
@tiny  volatile unsigned char SCIBRR   @0x52;	/* SCI Baud Rate Register */
@tiny  volatile unsigned char SCICR1   @0x53;	/* SCI Control Register 1 */
@tiny  volatile unsigned char SCICR2   @0x54;	/* SCI Control Register 2 */
@tiny  volatile unsigned char SCIERPR  @0x55;	/* SCI Receive Prescaler */
@tiny  volatile unsigned char SCIETPR  @0x57;	/* SCI Transmit Prescaler */

/*	ADC section */
@tiny  volatile unsigned char ADCCSR   @0x70;	/* ADC Control/Status Register */
@tiny  volatile unsigned char ADCDRH   @0x71;	/* ADC Data Register High */
@tiny  volatile unsigned char ADCDRL   @0x72;	/* ADC Data Register Low */

/*************************** (c) 2002  ST Microelectronics ****************************/
#endif