📄 platform.h
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/* DO NOT EDIT!! - this file automatically generated
* from .s file by awk -f s2h.awk
*/
/*****************************************************************************
* * Copyright (C) ARM Limited 1998. All rights reserved.
* *****************************************************************************/
/************************************************************************
*
* PID address map
*
* NOTE: This is a multi-hosted header file for use with uHAL and
* supported debuggers.
*
* ************************************************************************/
#ifndef __address_h
#define __address_h 1
#define PLATFORM_ID 0x00000040
/* Common modules for uHAL can be included or excluded by changing these
* definitions. These can be over-ridden by the makefile/ARM project file
* provided the .h file can is rebuilt.
*/
#ifndef uHAL_BOOT
#define uHAL_BOOT 1
#endif
#ifndef uHAL_TIMERS
#define uHAL_TIMERS 1
#endif
#ifndef uHAL_INTERRUPTS
#define uHAL_INTERRUPTS 1
#endif
#ifndef uHAL_COMPLEX_IRQ
#define uHAL_COMPLEX_IRQ 1
#endif
#ifndef uHAL_PCI
#define uHAL_PCI 0
#endif
#ifndef uHAL_HEAP
#define uHAL_HEAP 1
#define uHAL_HEAP_BASE SZ_256K
#define uHAL_HEAP_SIZE SZ_128K
#define uHAL_STACK_BASE SZ_512K
#define uHAL_STACK_SIZE SZ_128K
#endif
/* memory size */
#define uHAL_MEMORY_SIZE SZ_512K
#define PID7T_L1_TABLE_BASE 0x01004000
/* The APB FPGA */
#define ICBase 0x0A000000
#define CTBase 0x0A800000
#define RPCBase 0x0B000000
/* Remap and pause memory map */
#define RPC_Pause 0x00000000
#define RPC_Identification 0x00000010
#define RPC_ClearResetMap 0x00000020
#define RPC_ResetStatusSet 0x00000030
#define RPC_ResetStatusClear 0x00000034
/* IRQ/FIQ stuff */
#define IC_IRQStatus 0x00000000
#define IC_IRQRawStatus 0x00000004
#define IC_IRQEnable 0x00000008
#define IC_IRQEnableSet 0x00000008
#define IC_IRQEnableClear 0x0000000C
#define IC_FIQStatus 0x00000100
#define IC_FIQRawStatus 0x00000104
#define IC_FIQEnable 0x00000108
#define IC_FIQEnableSet 0x00000108
#define IC_FIQEnableClear 0x0000010C
#define IC_FIQSource 0x00000114
#define MAXIRQNUM 15
#define MAXFIQNUM 15
#define MAXSWINUM 15
#define NR_IRQS (MAXIRQNUM + 1)
#define RAM_BASE 0
#define RAM_SIZE 0x01000000
#define FLASH_BASE 0x04000000
#define FLASH_SIZE 0x04000000
#define CLEAN_BASE FLASH_BASE
#define CLEAN_SIZE FLASH_SIZE
#define FPGA_BASE 0x0A000000
#define FPGA_SIZE 0x02000000
#define IO_BASE 0x0C000000
#define IO_SIZE 0x04000000
/* Number of Level2 table entries in uHAL_AddressTable
*/
#define L2_TABLE_ENTRIES 1
/* UART */
/* define it so that it only ever uses one port */
#define HOST_COMPORT ST16C552_IO_BASE
#define SEMIHOSTED_COMPORT HOST_COMPORT
#define OS_COMPORT HOST_COMPORT
/* Values to set given baud rates */
#define DEFAULT_HOST_BAUD ARM_BAUD_9600
#define DEFAULT_OS_BAUD ARM_BAUD_38400
#define IO_MAPADDRESS(a) (((unsigned int) a << 2) | IO_BASE)
#define _MapAddress(a) IO_MAPADDRESS(a)
#define IO_READ(p) (*(unsigned char *)(IO_MAPADDRESS(p)))
#define IO_WRITE(p, c) (*(unsigned char *)(IO_MAPADDRESS(p)) = c)
/* This board uses the st16c552 UART as stdio */
#define ST16C552_IO_BASE (IO_BASE + 0x01800000)
/* UART primitives */
#define GET_STATUS(p) (*(volatile unsigned char *)((p) + ST16C552_LSR))
#define RX_DATA(s) ((s & LSRRxData) != 0)
#define GET_CHAR(p) (*(volatile unsigned char *)((p) + ST16C552_RHRTHR))
#define TX_READY(s) ((s & LSRTxHoldEmpty) != 0)
#define PUT_CHAR(p,c) (*(volatile unsigned char *)((p) + ST16C552_RHRTHR) = (c))
/* ST16C552 specific stuff */
/*
* * Clock Divisors for various Baud rates (assuming that
* * the PID is using a 1.843 MHz clock for the UART)
* */
#define ARM_BAUD_1200 0x0060
#define ARM_BAUD_2400 0x0030
#define ARM_BAUD_4800 0x0018
#define ARM_BAUD_9600 0x000c
#define ARM_BAUD_19200 0x0006
#define ARM_BAUD_38400 0x0003
#define ARM_BAUD_57600 0x0002
#define ARM_BAUD_115200 0x0001
/*
* * Register offsets
* */
#define ST16C552_RHRTHR 0x00
#define ST16C552_IER 0x04
#define ST16C552_ISRFCR 0x08
#define ST16C552_LCR 0x0C
#define ST16C552_MCR 0x10
#define ST16C552_LSR 0x14
#define ST16C552_MSR 0x18
#define ST16C552_SPR 0x1C
/*
* * Line Status Register bits
* */
#define LSRRxData (1 << 0)
#define LSROverrun (1 << 1)
#define LSRParity (1 << 2)
#define LSRFraming (1 << 3)
#define LSRBreak (1 << 4)
#define LSRTxHoldEmpty (1 << 5)
#define LSRTxEmpty (1 << 6)
#define LSRFIFOError (1 << 7)
/* LEDs */
#define uHAL_NUM_OF_LEDS 0
#define ALL_LEDS 0
#define uHAL_LED_MASKS { 0 }
#define uHAL_LED_OFFSETS { 0 }
#ifndef HIGH
#define HIGH 1
#endif
#define uHAL_LED_ON 1
#define uHAL_LED_OFF 0
/* Timer stuff */
#define TIMERBase 0x0A800000
#define TIMER_LOAD 0x00000000
#define TIMER_VALUE 0x00000004
#define TIMER_CONTROL 0x00000008
#define TIMER_CLEAR 0x0000000C
#define OS_TIMER 1
#define MAX_TIMER 1
/* The irq numbers of the individual timers
*/
#define TIMER_VECTORS { 0, 4}
/* 16Mhz clock, /16 divider, = 1000
*/
#define mSEC_1 1000
#define MAX_PERIOD 0xFFFF
#endif
/* END */
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