abl_lcd_params.c

sharp触摸屏测试代码

/***********************************************************************
 * $Workfile:   abl_lcd_params.c  $
 * $Revision:   1.2  $
 * $Author:   WellsK  $
 * $Date:   Mar 29 2004 11:59:18  $
 *
 * Project: Sharp LCD parameters
 *
 * Description:
 *     This file contains common LCD parameters used on all Sharp
 *     evaluation boards.
 *
 * Revision History:
 * $Log:   //smaicnt2/pvcs/VM/sharpmcu/archives/sharpmcu/software/abl/source/abl_lcd_params.c-arc  $
 * 
 *    Rev 1.2   Mar 29 2004 11:59:18   WellsK
 * Added support for LQ050 display.
 * 
 *    Rev 1.1   Dec 02 2003 10:04:58   WellsK
 * Corrected comments and a few values.
 * 
 *    Rev 1.0   Oct 28 2003 10:26:20   WellsK
 * Initial revision.
 * 
 *
 ***********************************************************************
 * SHARP MICROELECTRONICS OF THE AMERICAS MAKES NO REPRESENTATION
 * OR WARRANTIES WITH RESPECT TO THE PERFORMANCE OF THIS SOFTWARE,
 * AND SPECIFICALLY DISCLAIMS ANY RESPONSIBILITY FOR ANY DAMAGES, 
 * SPECIAL OR CONSEQUENTIAL, CONNECTED WITH THE USE OF THIS SOFTWARE.
 *
 * SHARP MICROELECTRONICS OF THE AMERICAS PROVIDES THIS SOFTWARE SOLELY 
 * FOR THE PURPOSE OF SOFTWARE DEVELOPMENT INCORPORATING THE USE OF A 
 * SHARP MICROCONTROLLER OR SYSTEM-ON-CHIP PRODUCT. USE OF THIS SOURCE
 * FILE IMPLIES ACCEPTANCE OF THESE CONDITIONS.
 *
 * COPYRIGHT (C) 2001 SHARP MICROELECTRONICS OF THE AMERICAS, INC.
 *     CAMAS, WA
 **********************************************************************/

#include "abl_lcd_params.h"

/* Sharp LQ035 portrait mode ADTFT display parameters */
const LCD_PARAM_T sharp_lq035 =
{
    21,       /* Horizontal back porch */
    11,       /* Horizontal front porch */
    13,       /* HSYNC pulse width */
    240,      /* Pixels per line */
    3,        /* Vertical back porch */
    4,        /* Vertical front porch */
    2,        /* VSYNC pulse width */
    320,      /* Lines per panel */
    0,        /* Do not invert output enable */
    1,        /* Invert panel clock */
    1,        /* Invert HSYNC */
    0,        /* Do not invert VSYNC */
    1,        /* AC bias frequency (not used) */
    18,       /* Bits per pixel */
    5213000,  /* Optimal clock rate (Hz) */
    ADTFT,    /* LCD panel type */
    0,        /* Single panel display */
    1,        /* HRTFT CLS enable flag */
    1,        /* HRTFT SPS enable flag */
    0,        /* HRTFT LP to PS delay */
    3,        /* HRTFT polarity delay */
    14,       /* HRTFT LP delay */
    34,       /* HRTFT SPL delay */
    209       /* HRTFT SPL to CLKS delay */
};

/* Sharp LQ039 HRTFT display parameters */
const LCD_PARAM_T sharp_lq039 =
{
    21,       /* Horizontal back porch */
    11,       /* Horizontal front porch */
    13,       /* HSYNC pulse width */
    320,      /* Pixels per line */
    3,        /* Vertical back porch */
    4,        /* Vertical front porch */
    2,        /* VSYNC pulse width */
    240,      /* Lines per panel */
    0,        /* Do not invert output enable */
    1,        /* Invert panel clock */
    1,        /* Invert HSYNC */
    0,        /* Do not invert VSYNC */
    1,        /* AC bias frequency (not used) */
    18,       /* Bits per pixel */
    5213000,  /* Optimal clock rate (Hz) */
    HRTFT,    /* LCD panel type */
    0,        /* Single panel display */
    1,        /* HRTFT CLS enable flag */
    1,        /* HRTFT SPS enable flag */
    9,        /* HRTFT LP to PS delay */
    3,        /* HRTFT polarity delay */
    14,       /* HRTFT LP delay */
    34,       /* HRTFT SPL delay */
    209       /* HRTFT SPL to CLKS delay */
};

/* Sharp LQ050 TFT display parameters */
const LCD_PARAM_T sharp_lq050 =
{
    21,       /* Horizontal back porch */
    11,       /* Horizontal front porch */
    13,       /* HSYNC pulse width */
    320,      /* Pixels per line */
    8,        /* Vertical back porch */
    5,        /* Vertical front porch */
    2,        /* VSYNC pulse width */
    240,      /* Lines per panel */
    0,        /* Do not invert output enable */
    0,        /* Do not invert panel clock */
    1,        /* Invert HSYNC */
    0,        /* Do not invert VSYNC */
    1,        /* AC bias frequency (not used) */
    18,       /* Bits per pixel */
    5213000,  /* Optimal clock rate (Hz) */
    TFT,      /* LCD panel type (NA in TFT mode) */
    0,        /* Single panel display */
    0,        /* HRTFT CLS enable flag (NA in TFT mode) */
    0,        /* HRTFT SPS enable flag (NA in TFT mode) */
    0,        /* HRTFT LP to PS delay (NA in TFT mode) */
    0,        /* HRTFT polarity delay (NA in TFT mode) */
    0,        /* HRTFT LP delay (NA in TFT mode) */
    0,        /* HRTFT SPL delay (NA in TFT mode) */
    0         /* HRTFT SPL to CLKS delay (NA in TFT mode) */
};

/* Sharp LQ057 TFT display parameters */
const LCD_PARAM_T sharp_lq057 =
{
    21,       /* Horizontal back porch */
    11,       /* Horizontal front porch */
    13,       /* HSYNC pulse width */
    320,      /* Pixels per line */
    8,        /* Vertical back porch */
    5,        /* Vertical front porch */
    2,        /* VSYNC pulse width */
    240,      /* Lines per panel */
    0,        /* Do not invert output enable */
    0,        /* Do not invert panel clock */
    1,        /* Invert HSYNC */
    0,        /* Do not invert VSYNC */
    1,        /* AC bias frequency (not used) */
    18,       /* Bits per pixel */
    5213000,  /* Optimal clock rate (Hz) */
    TFT,      /* LCD panel type (NA in TFT mode) */
    0,        /* Single panel display */
    0,        /* HRTFT CLS enable flag (NA in TFT mode) */
    0,        /* HRTFT SPS enable flag (NA in TFT mode) */
    0,        /* HRTFT LP to PS delay (NA in TFT mode) */
    0,        /* HRTFT polarity delay (NA in TFT mode) */
    0,        /* HRTFT LP delay (NA in TFT mode) */
    0,        /* HRTFT SPL delay (NA in TFT mode) */
    0         /* HRTFT SPL to CLKS delay (NA in TFT mode) */
};

/* Sharp LQ064 TFT display parameters */
const LCD_PARAM_T sharp_lq064 =
{
    89,       /* Horizontal back porch */
    50,       /* Horizontal front porch */
    14,       /* HSYNC pulse width */
    640,      /* Pixels per line */
    18,       /* Vertical back porch */
    94,       /* Vertical front porch */
    17,       /* VSYNC pulse width */
    480,      /* Lines per panel */
    0,        /* Do not invert output enable */
    0,        /* Do not invert panel clock */
    1,        /* Invert HSYNC */
    1,        /* Invert VSYNC */
    1,        /* AC bias frequency (not used) */
    18,       /* Bits per pixel */
    25180000, /* Optimal clock rate (Hz) */
    TFT,      /* LCD panel type (NA in TFT mode) */
    0,        /* Single panel display */
    0,        /* HRTFT CLS enable flag (NA in TFT mode) */
    0,        /* HRTFT SPS enable flag (NA in TFT mode) */
    0,        /* HRTFT LP to PS delay (NA in TFT mode) */
    0,        /* HRTFT polarity delay (NA in TFT mode) */
    0,        /* HRTFT LP delay (NA in TFT mode) */
    0,        /* HRTFT SPL delay (NA in TFT mode) */
    0         /* HRTFT SPL to CLKS delay (NA in TFT mode) */
};

/* Sharp LQ104 TFT display parameters */
const LCD_PARAM_T sharp_lq104 =
{
    88,       /* Horizontal back porch */
    40,      /* Horizontal front porch */
    128,      /* HSYNC pulse width */
    800,      /* Pixels per line */

    23,       /* Vertical back porch */
    1,      /* Vertical front porch */
    4,        /* VSYNC pulse width */
    600,      /* Lines per panel */

    0,        /* Do not invert output enable */
    0,        /* Do not invert panel clock */
    0,        /* Invert HSYNC */
    0,        /* Invert VSYNC */
    0,        /* AC bias frequency (not used) */
    16,       /* Bits per pixel */
//   35200000, /* Optimal clock rate (Hz) */
40000000,
    TFT,      /* LCD panel type (NA in TFT mode) */
    0,        /* Single panel display */
    0,        /* HRTFT CLS enable flag (NA in TFT mode) */
    0,        /* HRTFT SPS enable flag (NA in TFT mode) */
    0,        /* HRTFT LP to PS delay (NA in TFT mode) */
    0,        /* HRTFT polarity delay (NA in TFT mode) */
    0,        /* HRTFT LP delay (NA in TFT mode) */
    0,        /* HRTFT SPL delay (NA in TFT mode) */
    0         /* HRTFT SPL to CLKS delay (NA in TFT mode) */
};

/* Sharp LQ121 TFT display parameters */
const LCD_PARAM_T sharp_lq121 =
{
    89,       /* Horizontal back porch */
    169,      /* Horizontal front porch */
    129,      /* HSYNC pulse width */
    800,      /* Pixels per line */
    24,       /* Vertical back porch */
    44,       /* Vertical front porch */
    5,        /* VSYNC pulse width */
    600,      /* Lines per panel */
    0,        /* Do not invert output enable */
    0,        /* Do not invert panel clock */
    1,        /* Invert HSYNC */
    1,        /* Invert VSYNC */
    1,        /* AC bias frequency (not used) */
    18,       /* Bits per pixel */
    31680000, /* Optimal clock rate (Hz) */
    TFT,      /* LCD panel type (NA in TFT mode) */
    0,        /* Single panel display */
    0,        /* HRTFT CLS enable flag (NA in TFT mode) */
    0,        /* HRTFT SPS enable flag (NA in TFT mode) */
    0,        /* HRTFT LP to PS delay (NA in TFT mode) */
    0,        /* HRTFT polarity delay (NA in TFT mode) */
    0,        /* HRTFT LP delay (NA in TFT mode) */
    0,        /* HRTFT SPL delay (NA in TFT mode) */
    0         /* HRTFT SPL to CLKS delay (NA in TFT mode) */
};

/* Sharp LM10V DSTN display */
const LCD_PARAM_T sharp_lm10v =
{
    1,        /* Horizontal back porch */
    1,        /* Horizontal front porch */
    6,        /* HSYNC pulse width */
    640,      /* Pixels per line */
    1,        /* Vertical back porch */
    1,        /* Vertical front porch */
    2,        /* VSYNC pulse width */
    480,      /* Lines per panel */
    0,        /* Do not invert output enable */
    0,        /* Do not invert panel clock */
    0,        /* Do not invert HSYNC */
    0,        /* Do not invert VSYNC */
    21,       /* AC bias frequency */
    16,       /* Bits per pixel */
    12500000, /* Optimal clock rate (Hz) */
    CSTN,     /* LCD panel type */
    1,        /* Dual panel display */
    0,        /* HRTFT CLS enable flag (NA) */
    0,        /* HRTFT SPS enable flag (NA) */
    0,        /* HRTFT LP to PS delay (NA) */
    0,        /* HRTFT polarity delay (NA) */
    0,        /* HRTFT LP delay (NA) */
    0,        /* HRTFT SPL delay (NA) */
    0         /* HRTFT SPL to CLKS delay (NA) */
};