lh7a400_usb.h

sharp触摸屏测试代码

/**********************************************************************
 *  $Workfile:   LH7A400_usb.h  $
 *  $Revision:   1.4  $
 *  $Author:   MaysR  $
 *  $Date:   Aug 29 2002 09:03:16  $
 *
 *	Project: LH7A400 headers
 *
 *	Description:
 *      This file contains the structure definitions and manifest
 *      constants for LH7A400 component:
 *          Universal Serial Bus Client
 *
 *	References:
 *		(1) Sharp LH7A400 Universal SoC User's Guide
 *
 *	Revision History:
 *  $Log:   //smaicnt2/pvcs/VM/CHIPS/archives/SOC/LH7A400/Processor/LH7A400_usb.h-arc  $
 * 
 *    Rev 1.4   Aug 29 2002 09:03:16   MaysR
 * Renamed register structure members.
 * 
 *    Rev 1.3   Jun 20 2002 10:47:50   MaysR
 * Removed rouge semi-colons.
 * 
 *    Rev 1.2   Jun 19 2002 14:36:50   MaysR
 * Added missing _SBF to bit field defines.
 * 
 *    Rev 1.1   Jun 17 2002 16:24:08   MaysR
 * Corrected definition duplication with CLSCS header file.
 * 
 *    Rev 1.0   Jun 17 2002 16:06:20   MaysR
 * Initial revision.
 * 
 * 
 * SHARP MICROELECTRONICS OF THE AMERICAS MAKES NO REPRESENTATION
 * OR WARRANTIES WITH RESPECT TO THE PERFORMANCE OF THIS SOFTWARE,
 * AND SPECIFICALLY DISCLAIMS ANY RESPONSIBILITY FOR ANY DAMAGES, 
 * SPECIAL OR CONSEQUENTIAL, CONNECTED WITH THE USE OF THIS SOFTWARE.
 *
 * SHARP MICROELECTRONICS OF THE AMERICAS PROVIDES THIS SOFTWARE SOLELY 
 * FOR THE PURPOSE OF SOFTWARE DEVELOPMENT INCORPORATING THE USE OF A 
 * SHARP MICROCONTROLLER OR SYSTEM-ON-CHIP PRODUCT. USE OF THIS SOURCE
 * FILE IMPLIES ACCEPTANCE OF THESE CONDITIONS.
 *
 *	COPYRIGHT (C) 2001 SHARP MICROELECTRONICS OF THE AMERICAS, INC.
 *		CAMAS, WA
 *********************************************************************/

#ifndef LH7A400_USB_H
#define LH7A400_USB_H

#include "SMA_types.h"

/* USB Module Register Structure */ 

typedef struct 
{
/* Non-indexed register map */
    volatile UNS_32   funcaddr;      /* Function Address register */ 
    volatile UNS_32   pwrmgnt;       /* Power Management register */ 
    volatile UNS_32   in_int;        /* In interrupt bank1 register */
    volatile UNS_32   reserved1;     /* 0x20C */
    volatile UNS_32   out_int;       /* Out interrupt bank 1 register */
    volatile UNS_32   reserved2;     /* 0x214 */
    volatile UNS_32   intreg;        /* Interrupt register bank */ 
    volatile UNS_32   in_int_en;     /* In interrupt enable reg bank */ 
    volatile UNS_32   reserved3;     /* 0x220 */
    volatile UNS_32   out_int_en;    /* Out interrupt enable reg bank */ 
    volatile UNS_32   reserved4;     /* 0x228 */
    volatile UNS_32   int_en;        /* Interrupt enable reg bank */ 
    volatile UNS_32   frame1;        /* Frame 1 register */
    volatile UNS_32   frame2;        /* Frame 2 register */
    volatile UNS_32   index;         /* Index register */
    volatile UNS_32   reserved5;     /* 0x23C */
/* Indexed register map */
    volatile UNS_32   inmaxp;        /* In maxP register */
    volatile UNS_32   incsr1;        /* In CSR1 register */
    volatile UNS_32   incsr2;        /* In CSR2 register */
    volatile UNS_32   outmaxp;       /* Out maxP register */
    volatile UNS_32   outcsr1;       /* Out CSR1 register */
    volatile UNS_32   outcsr2;       /* Out CSR2 register */
    volatile UNS_32   fifowc1;       /* Fifo write count 1 register */
    volatile UNS_32   fifowc2;       /* Fifo write count 2 register */
    volatile UNS_32   reserved6[32]; /* 0x260 */
/* FIFO register map */
    volatile UNS_32   ep0_fifo;      /* Endpoint 0 FIFO */
    volatile UNS_32   ep1_fifo;      /* Endpoint 1 FIFO */           
    volatile UNS_32   ep2_fifo;      /* Endpoint 2 FIFO */           
    volatile UNS_32   ep3_fifo;      /* Endpoint 3 FIFO */            
} USBREGS;

/**********************************************************************
 * Function Address Register Bit Fields
 *********************************************************************/ 
#define USB_FUNCT_ADDR(n)           _SBF(0, (n & 0x7F))
#define USB_ADDR_UPDATE             _BIT(7)

/**********************************************************************
 * Power Management Register Bit Fields
 *********************************************************************/ 
#define USB_EN_SUSPEND              _BIT(0)
#define USB_SUSPEND_MODE            _BIT(1)
#define USB_UC_RESUNE               _BIT(2)
#define USB_RESET                   _BIT(3)
#define USB_ENABLE                  _BIT(4)

/**********************************************************************
 * In Interrupt Register Bit Fields
 *********************************************************************/ 
#define USB_EP0                     _BIT(0)
#define USB_EP1                     _BIT(1)
#define USB_EP3                     _BIT(3)

/**********************************************************************
 * Out Interrupt Register Bit Fields
 *********************************************************************/ 
#define USB_EP2                     _BIT(2)

/**********************************************************************
 * USB Interrupt Register Bit Fields
 *********************************************************************/ 
#define USB_IF_SUSPEND              _BIT(0)
#define USB_IF_RESUME               _BIT(1)
#define USB_IF_RESET                _BIT(2)

/**********************************************************************
 * USB Interrupt Enable Register Bit Fields
 *********************************************************************/ 
#define USB_IF_SUSPEND_EN           _BIT(0)
#define USB_IF_RESET_EN             _BIT(2)

/**********************************************************************
 * USB In/Out Control/Status Register 1 Bit Fields
 *********************************************************************/ 
#define USB_PKT_READY               _BIT(0)
#define USB_FIFO_NOT_EMPTY          _BIT(1)
#define USB_FIFO_FLUSH              _BIT(3)
#define USB_SEND_STALL              _BIT(4)
#define USB_SENT_STALL              _BIT(5)
#define USB_CLEAR_DATA              _BIT(6)

/**********************************************************************
 * USB In/Out Control/Status Register 2 Bit Fields
 *********************************************************************/ 
#define USB_DMA_ENABLE              _BIT(4)
#define USB_AUTO_SET_CLR            _BIT(7)

/**********************************************************************
 * USB EP0 Control/Status Register Bit Fields
 *********************************************************************/ 
#define USB_OUT_PKT_READY           _BIT(0)
#define USB_IN_PKT_READY            _BIT(1)
#define USB_EP0_SENT_STALL          _BIT(2)
#define USB_EP0_DATA_END            _BIT(3)
#define USB_EP0_SETUP_END           _BIT(4)
#define USB_EP0_SEND_STALL          _BIT(5)
#define USB_EP0_SVC_OUT_PKT_READY   _BIT(6)
#define USB_EP0_SVC_SETUP_END       _BIT(7)

/**********************************************************************
 * MaxP Register Bit Fields
 *********************************************************************/ 
#define USB_MAXP(n)                 _SBF(0, (n & 0xF))

#endif /* LH7A400_USB_H */