lh7a400_bmi.h

sharp触摸屏测试代码

/**********************************************************************
 * $Workfile:   LH7A400_bmi.h  $
 * $Revision:   1.3  $
 * $Author:   SuryanG  $
 * $Date:   Apr 02 2002 12:13:34  $
 *
 *	Project: LH7A400 headers
 *
 *	Description:
 *      This file contains the structure definitions and manifest
 *      constants for the LH7A400 component:
 *       Battery Monitor Interface
 *
 *	References:
 *		(1) Sharp LH7A400 Universal SoC User's Guide
 *
 *  $Log:   P:/PVCS6_6/archives/SOC/LH7A400/Processor/LH7A400_bmi.h-arc  $
 * 
 *    Rev 1.3   Apr 02 2002 12:13:34   SuryanG
 * Made structure definition comply with coding standards.
 * 
 *    Rev 1.2   Apr 01 2002 10:52:24   SuryanG
 * Added legal disclaimer.
 * 
 *    Rev 1.1   Jan 03 2002 11:13:38   MaysR
 * Added missing semi-colons in structure items.
 *
 *    Rev 1.0   Dec 26 2001 14:40:00   MaysR
 * Initial revision.
 *
 * SHARP MICROELECTRONICS OF THE AMERICAS MAKES NO REPRESENTATION
 * OR WARRANTIES WITH RESPECT TO THE PERFORMANCE OF THIS SOFTWARE,
 * AND SPECIFICALLY DISCLAIMS ANY RESPONSIBILITY FOR ANY DAMAGES, 
 * SPECIAL OR CONSEQUENTIAL, CONNECTED WITH THE USE OF THIS SOFTWARE.
 *
 * SHARP MICROELECTRONICS OF THE AMERICAS PROVIDES THIS SOFTWARE SOLELY 
 * FOR THE PURPOSE OF SOFTWARE DEVELOPMENT INCORPORATING THE USE OF A 
 * SHARP MICROCONTROLLER OR SYSTEM-ON-CHIP PRODUCT. USE OF THIS SOURCE
 * FILE IMPLIES ACCEPTANCE OF THESE CONDITIONS.
 *
 *	COPYRIGHT (C) 2001 SHARP MICROELECTRONICS OF THE AMERICAS, INC.
 *		CAMAS, WA
 *********************************************************************/

#ifndef LH7A400_BMI_H
#define LH7A400_BMI_H

#include "SMA_types.h"

/**********************************************************************
* Battery Monitor Interface Register definitions
**********************************************************************/

/* Single Wire Interface */

typedef struct
{
   volatile UNS_32   swidr;              /* Data Register */
   volatile UNS_32   swicr;              /* Control Register */
   volatile UNS_32   swisr;              /* Status Register */
   union
   {
      volatile UNS_32   swirisr;         /* Raw Interupt Status */
      volatile UNS_32   swieoi;          /* Raw Interupt clear */
   } swirsr;                             /* Raw Status Register */
   volatile UNS_32   swiisr;             /* Interrupt Status Register */
   volatile UNS_32   swiie;              /* Interrupt Enable Register */
   volatile UNS_32   switr;              /* Timing Register */
   volatile UNS_32   swibr;              /* Break Register */
} SWIREGS;                               /* Single Wire Interface */

/* Smart Battery Interface */

typedef struct
{
   volatile UNS_32   sbidr;              /* Data Register */
   volatile UNS_32   sbicr;              /* Control Register */
   volatile UNS_32   sbicount;              /* Status Register */
   volatile UNS_32   sbisr;              /* Status Register */
   union
   {
      volatile UNS_32   sbirisr;         /* Raw Interupt Status */
      volatile UNS_32   sbieoi;          /* Raw Interupt clear */
   } smbrsr;                             /* Raw Status Register */
   volatile UNS_32   sbiisr;             /* Interrupt Status Register */
   volatile UNS_32   sbiie;              /* Interrupt Enable Register */
} SBIREGS;                               /* Smart Battery Interface */


/**********************************************************************
 * Bit field definitions for Single Wire Interface registers
 *********************************************************************/

/* Single Wire Interface Control Register bits */
#define  SWICR_SP_INVERT      _BIT(16)
#define  SWICR_T_RST          _BIT(15)
#define  SWICR_RDSS(n)        _SBF(9, ((n)&(_BITMASK(6))))
#define  SWICR_WDCS(n)        _SBF(3, ((n)&(_BITMASK(6))))
#define  SWICR_SWIDINV        _BIT(2)
#define  SWICR_GBS            _BIT(1)
#define  SWICR_SWIEN          _BIT(0)

/* Single Wire Interface Status Register bits */
#define  SWISR_COL            _BIT(11)
#define  SWISR_TEF            _BIT(10)
#define  SWISR_RXB            _BIT(9)
#define  SWISR_BRF            _BIT(8)
#define  SWISR_BRS            _BIT(7)
#define  SWISR_BKS            _BIT(6)
#define  SWISR_WRF            _BIT(5)
#define  SWISR_WTF            _BIT(4)
#define  SWISR_PBS            _BIT(3)
#define  SWISR_DBS            _BIT(2)
#define  SWISR_SBS            _BIT(1)
#define  SWISR_TXB            _BIT(0)

/* Single Wire Interface Raw Interrupt Status Register bits */
#define  SWIRISR_RBRIS        _BIT(2)
#define  SWIRISR_RWRIS        _BIT(1)
#define  SWIRISR_RWTIS        _BIT(0)

/* Single Wire Interface Interrupt Status Register bits */
#define  SWIISR_BRIS          _BIT(2)
#define  SWIISR_WRIS          _BIT(1)
#define  SWIISR_WTIS          _BIT(0)

/* Single Wire Interface Enable Register bits */
#define  SWIIER_BRIE          _BIT(2)
#define  SWIIER_WRIE          _BIT(1)
#define  SWIIER_WTIE          _BIT(0)

/* Single Wire Interface Timing Register */
#define  SWITR_BTG(n)         ((n)&(_BITMASK(16)))

/* Single Wire Interface Break Register bits */
#define  SWIBR_BT(n)          _SBF(12, ((n)&(_BITMASK(12))))
#define  SWIBR_BRT(n)         ((n)&(_BITMASK(12)))

/**********************************************************************
 * Bit field definitions for Smart Battery Interface registers
 *********************************************************************/

/* Smart Battery Interface Control Register bits */
#define  SBICR_PEF            _BIT(25)
#define  SBICR_BRF            _BIT(24)
#define  SBICR_TOC(n)         _SBF(13, ((n)&(_BITMASK(12))))
#define  SBICR_RX_FDIS        _BIT(11)
#define  SBICR_TX_FDIS        _BIT(10)
#define  SBICR_DIVFACT(n)     _SBF(2, ((n)&(_BITMASK(8))))
#define  SBICR_FFLUSH         _BIT(1)
#define  SBICR_SMB_EN         _BIT(0)

/* Smart Battery Interface Count Register bits */
#define  SBICOUNT_READ(n)     _SBF(11, ((n)&(_BITMASK(5))))
#define  SBICOUNT_REP(n)      _SBF(5, ((n)&(_BITMASK(5))))
#define  SBICOUNT_PRE(n)      ((n)&(_BITMASK(5)))

/* Smart Battery Status Register bits */
#define  SBISR_SBH            _BIT(12)
#define  SBISR_CLT            _BIT(11)
#define  SBISR_TXUE           _BIT(10)
#define  SBISR_RXOE           _BIT(9)
#define  SBISR_ACKFAIL        _BIT(8)
#define  SBISR_RnW            _BIT(7)
#define  SBISR_SLV            _BIT(6)
#define  SBISR_MSTR           _BIT(5)
#define  SBISR_TXBUSY         _BIT(4)
#define  SBISR_TXFF           _BIT(3)
#define  SBISR_RXFF           _BIT(2)
#define  SBISR_TXFE           _BIT(1)
#define  SBISR_RXFE           _BIT(0)

/* Smart Battery Raw Interrupt Status Register bits */
#define  SBIRISR_RCLTIS       _BIT(7)
#define  SBIRISR_RSTCIS       _BIT(6)
#define  SBIRISR_RALIS        _BIT(5)
#define  SBIRISR_RAFIS        _BIT(4)
#define  SBIRISR_RRIS         _BIT(3)
#define  SBIRISR_RTIS         _BIT(2)
#define  SBIRISR_RRTIS        _BIT(1)
#define  SBIRISR_RMTCIS       _BIT(0)

/* Smart Battery Interrupt Status Register bits */
#define  SBIISR_CLTIS         _BIT(7)
#define  SBIISR_STCIS         _BIT(6)
#define  SBIISR_ALIS          _BIT(5)
#define  SBIISR_AFIS          _BIT(4)
#define  SBIISR_RIS           _BIT(3)
#define  SBIISR_TIS           _BIT(2)
#define  SBIISR_RTIS          _BIT(1)
#define  SBIISR_MTCIS         _BIT(0)

/* Smart Battery Interrupt Enable Register bits */
#define  SBIIE_CLTIS         _BIT(7)
#define  SBIIE_STCIE         _BIT(6)
#define  SBIIE_ALE           _BIT(5)
#define  SBIIE_AFE           _BIT(4)
#define  SBIIE_RIE           _BIT(3)
#define  SBIIE_TIE           _BIT(2)
#define  SBIIE_RTIE          _BIT(1)
#define  SBIIE_TCIE          _BIT(0)

#endif /* LH7A400_BMI_H */