lh7a400_iocon.h

sharp触摸屏测试代码

/**********************************************************************
 *	$Workfile:   LH7A400_iocon.h  $
 *	$Revision:   1.1  $
 *	$Author:   SuryanG  $
 *	$Date:   Apr 02 2002 11:06:14  $
 *
 **********************************************************************
 *********** PRELIMINARY ! ! ! ****************************************
 *********** Placeholder ONLY ! ! ! ***********************************
 **********************************************************************
 *	Project: LH7A400 IP headers
 *
 *	Description:
 *      This file contains the structure definitions and manifest
 *      constants for ARM IP component:
 *      	I/O Configuration Block 
 *
 *	References:
 *		(1) Sharp LH7A400 Universal SoC User's Guide,
 *
 *	Revision History:
 *	$Log:   P:/PVCS6_6/archives/SOC/Processors/LH7A400/LH7A400_iocon.h-arc  $
 * 
 *    Rev 1.1   Apr 02 2002 11:06:14   SuryanG
 * Added legal disclaimer.
 * 
 *    Rev 1.0   Sep 19 2001 17:23:50   BarnettH
 * Initial revision.
 * 
 * SHARP MICROELECTRONICS OF THE AMERICAS MAKES NO REPRESENTATION
 * OR WARRANTIES WITH RESPECT TO THE PERFORMANCE OF THIS SOFTWARE,
 * AND SPECIFICALLY DISCLAIMS ANY RESPONSIBILITY FOR ANY DAMAGES, 
 * SPECIAL OR CONSEQUENTIAL, CONNECTED WITH THE USE OF THIS SOFTWARE.
 *
 * SHARP MICROELECTRONICS OF THE AMERICAS PROVIDES THIS SOFTWARE SOLELY 
 * FOR THE PURPOSE OF SOFTWARE DEVELOPMENT INCORPORATING THE USE OF A 
 * SHARP MICROCONTROLLER OR SYSTEM-ON-CHIP PRODUCT. USE OF THIS SOURCE
 * FILE IMPLIES ACCEPTANCE OF THESE CONDITIONS.
 *
 *	COPYRIGHT (C) 2001 SHARP MICROELECTRONICS OF THE AMERICAS, INC.
 *		CAMAS, WA
 *********************************************************************/

#ifndef LH7A400_IOCON_H
#define LH7A400_IOCON_H

#include "SMA_types.h"

/*
 * IO Configuration Block Structure
 */ 
typedef struct 
{
	volatile UNS_32	memmux;
	volatile UNS_32	lcdmux;
	volatile UNS_32	miscmux;
	volatile UNS_32	dmamux;
	volatile UNS_32	uartmux;
	volatile UNS_32	ssimux;
	volatile UNS_32	scratchreg;
}IOCONREGS;

/*
 * Memory Multiplexing IOCON Register Bit Field constants
 */ 
#define MEMMUX_PIOE_NOMUX		_SBF(0,0)
#define MEMMUX_MIDQM32			_SBF(0,1)
#define MEMMUX_MIDQM30			_SBF(0,3)
#define MEMMUX_PIOE4			_SBF(2,0)
#define MEMMUX_MINWE			_SBF(2,1)
#define MEMMUX_PIOE5			_SBF(3,0)
#define MEMMUX_MISDNCS0			_SBF(3,1)
#define MEMMUX_PIOE6			_SBF(4,0)
#define MEMMUX_MISDNCS1			_SBF(4,1)
#define MEMMUX_PIOE7			_SBF(5,0)
#define MEMMUX_MICKE			_SBF(5,1)
#define MEMMUX_PIOF0			_SBF(6,0)
#define MEMMUX_MICLKIO			_SBF(6,1)
#define MEMMUX_PIO_X			_SBF(7,0)
#define MEMMUX_MIDATA_X			_SBF(7,1)
#define MEMMUX_PIOH2			_SBF(8,0)
#define MEMMUX_MICSN3			_SBF(8,1)
#define MEMMUX_PIOH3			_SBF(9,0)
#define MEMMUX_MICSN4			_SBF(9,1)
#define MEMMUX_PIOH4			_SBF(10,0)
#define MEMMUX_MICSN5			_SBF(10,1)
#define MEMMUX_PIOH5			_SBF(11,0)
#define MEMMUX_MICSN6			_SBF(11,1)
#define MEMMUX_PIOH6			_SBF(12,0)
#define MEMMUX_MIBLSN2			_SBF(12,1)
#define MEMMUX_PIOH7			_SBF(13,0)
#define MEMMUX_MIBLSN3			_SBF(13,1)

/*
 * LCD Multiplexing IOCON Register Bit Field constants
 */ 
#define LCDMUX_PIOB4			_SBF(0,0)
#define LCDMUX_CLUBL			_SBF(0,1)
#define LCDMUX_CLD12			_SBF(0,3)
#define LCDMUX_PIOB5			_SBF(2,0)
#define LCDMUX_CLCLS			_SBF(2,1)
#define LCDMUX_CLD13			_SBF(2,3)
#define LCDMUX_PIOB6			_SBF(4,0)
#define LCDMUX_CLPS				_SBF(4,1)
#define LCDMUX_CLD14			_SBF(4,3)
#define LCDMUX_PIOB7			_SBF(6,0)
#define LCDMUX_CLVBENB			_SBF(6,1)
#define LCDMUX_CLD15			_SBF(6,3)
#define LCDMUX_PIOC0			_SBF(8,0)
#define LCDMUX_CLDEN			_SBF(8,1)
#define LCDMUX_PIOC1			_SBF(9,0)
#define LCDMUX_CLVDDEN			_SBF(9,1)
#define LCDMUX_PIOC2			_SBF(10,0)
#define LCDMUX_CLXCLK			_SBF(10,1)
#define LCDMUX_PIOC3			_SBF(11,0)
#define LCDMUX_CLCP				_SBF(11,1)
#define LCDMUX_PIOC4			_SBF(12,0)
#define LCDMUX_CLDSPLEN			_SBF(12,1)
#define LCDMUX_PIOC5			_SBF(13,0)
#define LCDMUX_CLLP				_SBF(13,1)
#define LCDMUX_PIOC6			_SBF(14,0)
#define LCDMUX_CLVEEEN			_SBF(14,1)
#define LCDMUX_PIOC7			_SBF(15,0)
#define LCDMUX_CLFP				_SBF(15,1)
#define LCDMUX_DATA_NOMUX		_SBF(16,0)
#define LCDMUX_DATA_CFG1		_SBF(16,1)
#define LCDMUX_DATA_CFG2		_SBF(16,2)
#define LCDMUX_DATA_CFG3		_SBF(16,3)

/*
 * Miscellaneous Multiplexing IOCON Register Bit Field constants
 */ 
#define	MISCMUX_PWM1			_SBF(0,0)
#define	MISCMUX_DCDEOT1			_SBF(0,1)
#define	MISCMUX_PIOA5			_SBF(1,0)
#define	MISCMUX_RCCLKOUT		_SBF(1,1)
#define	MISCMUX_PIOA6			_SBF(2,0)
#define	MISCMUX_RCEII0			_SBF(2,1)
#define	MISCMUX_PIOA7			_SBF(3,0)
#define	MISCMUX_RCEII1			_SBF(3,1)
#define	MISCMUX_PIOB0			_SBF(4,0)
#define	MISCMUX_RCEII2			_SBF(4,1)
#define	MISCMUX_RCEII3			_SBF(5,0)
#define	MISCMUX_PWM0SYNC		_SBF(5,1)
#define	MISCMUX_RCEII4			_SBF(6,0)
#define	MISCMUX_PWM0			_SBF(6,1)
#define	MISCMUX_RCCTOUT			_SBF(7,0)
#define	MISCMUX_DCDACK1			_SBF(7,1)
#define	MISCMUX_DCDREQ1			_SBF(8,0)
#define	MISCMUX_RCEII5			_SBF(8,1)
#define	MISCMUX_PIOF1			_SBF(9,0)
#define	MISCMUX_RCCLKEN			_SBF(9,1)
#define	MISCMUX_RCCLKIN			_SBF(10,0)
#define	MISCMUX_RCUTCLK			_SBF(10,1)

/*
 * DMA Multiplexing IOCON Register Bit Field constants
 */ 
#define	DMAMUX_PIOB1			_SBF(0,0)
#define	DMAMUX_DCDEOT0			_SBF(0,1)
#define	DMAMUX_PIOB2			_SBF(1,0)
#define	DMAMUX_DCDACK0N			_SBF(1,1)
#define	DMAMUX_PIOB3			_SBF(2,0)
#define	DMAMUX_DCDREQ0			_SBF(2,1)

/*
 * UART Multiplexing IOCON Register Bit Field constants
 */ 
#define	UARTMUX_UT0IRRXA		_SBF(0,0)
#define	UARTMUX_UT0RXD			_SBF(0,1)
#define	UARTMUX_UT0IRTXA		_SBF(1,0)
#define	UARTMUX_UT0TXD			_SBF(1,1)
#define	UARTMUX_PIOA3			_SBF(2,0)
#define	UARTMUX_UT1RXD			_SBF(2,1)
#define	UARTMUX_PIOA4			_SBF(3,0)
#define	UARTMUX_UT1TXD			_SBF(3,1)

/*
 * SSI Multiplexing IOCON Register Bit Field constants
 */ 
#define	SSIMUX_SSPIN			_SBF(0,0)
#define	SSIMUX_UT2RXD			_SBF(0,1)
#define	SSIMUX_SSPOUT			_SBF(1,0)
#define	SSIMUX_UT2TXD			_SBF(1,1)
#define	SSIMUX_PIOA0			_SBF(2,0)
#define	SSIMUX_SSPENB			_SBF(2,1)
#define	SSIMUX_PIOA1			_SBF(3,0)
#define	SSIMUX_SSPCLK			_SBF(3,1)
#define	SSIMUX_PIOA2			_SBF(4,0)
#define	SSIMUX_SSPFRM			_SBF(4,1)

#endif /* LH7A400_IOCON_H */