lh7a400_uart.h

sharp触摸屏测试代码

/***********************************************************************    
 *	$Workfile:   lh7a400_uart.h  $
 *	$Revision:   1.5  $
 *	$Author:   BarnettH  $
 *	$Date:   Jun 19 2002 17:25:12  $
 *
 *	Project: LH7A400 headers
 *
 *	Description:
 *      This file contains the structure definitions and manifest
 *      constants for the LH7A400 component:
 *      	UART
 *
 *	References:
 *		(1) Sharp LH7A400 Universal SoC User's Guide
 *
 *	Revision History:
 *	$Log:   //smaicnt2/pvcs/VM/CHIPS/archives/SOC/LH7A400/Processor/lh7a400_uart.h-arc  $
 * 
 *    Rev 1.5   Jun 19 2002 17:25:12   BarnettH
 * Corrected UART_LCR_PODD definition error.
 * Added UART_LCR_EPS.
 * 
 *    Rev 1.4   Jun 13 2002 14:50:00   BarnettH
 * EIT Alpha1.  Revised register names to agree with documentaton.  Added structures and enums. Rearranged order of Bit Field definitions to be consistent.
 * 
 *    Rev 1.3   Apr 02 2002 12:11:08   SuryanG
 * Made structure definition comply with coding standards.
 * 
 *    Rev 1.2   Apr 02 2002 10:18:12   SuryanG
 * Added legal header.
 * 
 *    Rev 1.1   Feb 06 2002 17:47:30   BarnettH
 * Added UART_NUM_MAX
 * Removed PACKED
 * 
 *    Rev 1.0   Oct 04 2001 14:32:44   BarnettH
 * Initial revision.
 * 
 * SHARP MICROELECTRONICS OF THE AMERICAS MAKES NO REPRESENTATION
 * OR WARRANTIES WITH RESPECT TO THE PERFORMANCE OF THIS SOFTWARE,
 * AND SPECIFICALLY DISCLAIMS ANY RESPONSIBILITY FOR ANY DAMAGES, 
 * SPECIAL OR CONSEQUENTIAL, CONNECTED WITH THE USE OF THIS SOFTWARE.
 *
 * SHARP MICROELECTRONICS OF THE AMERICAS PROVIDES THIS SOFTWARE SOLELY 
 * FOR THE PURPOSE OF SOFTWARE DEVELOPMENT INCORPORATING THE USE OF A 
 * SHARP MICROCONTROLLER OR SYSTEM-ON-CHIP PRODUCT. USE OF THIS SOURCE
 * FILE IMPLIES ACCEPTANCE OF THESE CONDITIONS.
 *
 *	COPYRIGHT (C) 2001 SHARP MICROELECTRONICS OF THE AMERICAS, INC.
 *		CAMAS, WA
 **********************************************************************/

#ifndef LH7A400_UART_H
#define LH7A400_UART_H

#include "SMA_types.h"

/***********************************************************************    
 * UART Module Register Structure
 **********************************************************************/
typedef struct 
{
    volatile UNS_32 data;       // Data
    volatile UNS_32 lcr;        // Line Control
    volatile UNS_32 bcr;        // Baud Rate Control
    volatile UNS_32 control;    // Control
    volatile UNS_32 status;     // Status Flag
    volatile UNS_32 intraw;     // Raw Interrupt
    volatile UNS_32 inte;       // Interrupt Enable
    volatile UNS_32 intr;       // Resultant Interrupt
} UARTREGS;

typedef enum
{
    UART_PARITY_NONE,
    UART_PARITY_EVEN,
    UART_PARITY_ODD,
    UART_PARITY_SIZE,
    UART_PARITY_SIZER = 255
} UARTPARITY;

typedef enum
{
    UART_MODE_UART,
    UART_MODE_SIR,
    UART_MODE_SIR_LOWPOWER,
    UART_MODE_UART_LBE,
    UART_MODE_SIR_LBE,
    UART_MODE_SIR_LOWPOWER_LBE,
    UART_MODE_SIZE,
    UART_MODE_SIZER = 255
} UARTMODE;

typedef struct 
{
    volatile UARTMODE mode; 
    volatile UNS_32 baudrate;
    volatile UNS_32 wordlen;
    volatile UARTPARITY parity;
    volatile UNS_32 stopbits;
    volatile UNS_32 polarity;  // 'or' of up to three constants
    volatile UNS_32 fifo;
} UARTINIT;

#define UART_NUM_MAX    3       // maximum number of UART's

/***********************************************************************    
 * UART Data Register Bit Fields
 **********************************************************************/
#define UART_DATA_BE         _BIT(11)    // Break Error
#define UART_DATA_OE         _BIT(10)    // Overrun Error
#define UART_DATA_PE         _BIT(9)     // Parity Error
#define UART_DATA_FE         _BIT(8)     // Framing Error
#define UART_DATA_MASK       (0xFF)      // Data (8 bits)

/***********************************************************************    
 * UART Line Control Register Bit Fields
 **********************************************************************/
#define UART_LCR_WLEN(n)    ((_SBF(5,((n) - 5))) & 0x60)
#define UART_LCR_WLEN5     _SBF(5,0)     // 5 bits
#define UART_LCR_WLEN6     _SBF(5,1)     // 6 bits
#define UART_LCR_WLEN7     _SBF(5,2)     // 7 bits
#define UART_LCR_WLEN8     _SBF(5,3)     // 8 bits
#define UART_LCR_FEN       _SBF(4,1)     // FIFO Enable
#define UART_LCR_STP1      _SBF(3,0)     // One Stop Bits Select
#define UART_LCR_STP2      _SBF(3,1)     // Two Stop Bits Select
#define UART_LCR_EPS       _SBF(2,1)     // Even Parity Select
#define UART_LCR_PEVEN     _SBF(2,1)     // Even Parity Select
#define UART_LCR_PODD      _SBF(2,0)     // Odd Parity Select
#define UART_LCR_PEN       _SBF(1,1)     // Parity Enable
#define UART_LCR_PNONE     _SBF(1,0)     // Parity None
#define UART_LCR_SENDBRK   _SBF(0,1)     // Assert Break

/***********************************************************************    
 * UART Baud Rate Control Register Bit Field
 **********************************************************************/
#define UART_BCR(n)        ((7372800 / (16 * (n))) - 1)
// The following values assume a UART clock frequency of 7.3728 MHz
#define UART_BCR_2400      0xBF
#define UART_BCR_4800      0x5F
#define UART_BCR_9600      0x2F
#define UART_BCR_19200     0x17
#define UART_BCR_28800     0xF
#define UART_BCR_38400     0xB
#define UART_BCR_57600     0x7
#define UART_BCR_115200    0x3
#define UART_BCR_153600    0x2
#define UART_BCR_230400    0x1
#define UART_BCR_460800    0x0

/***********************************************************************    
 * UART Control Register Bit Fields
 **********************************************************************/
#define UART_CONTROL_SIRBD       _BIT(7) // SIR Blanking Disable
#define UART_CONTROL_LBE         _BIT(6) // Loop Back Enable
#define UART_CONTROL_MXP         _BIT(5) // Modem Polarity Select
#define UART_CONTROL_TXP         _BIT(4) // Xmit Pin Polarity Select
#define UART_CONTROL_RXP         _BIT(3) // Receive Pin Polarity Select
#define UART_CONTROL_SIRLP       _BIT(2) // IrDA SIR Low Power Mode
#define UART_CONTROL_SIR_ENABLE        0 // SIR Enable
#define UART_CONTROL_SIR_DISABLE _BIT(1) // SIR Disable
#define UART_CONTROL_SIREN       _BIT(1) // SIR !DISABLE! bit
#define UART_CONTROL_EN          _BIT(0) // UART Enable
#define UART_CONTROL_UART_ENABLE _BIT(0) // UART Enable

/***********************************************************************    
 * UART Status Register Bit Fields
 **********************************************************************/
#define UART_STATUS_TXFE   _BIT(7)       // Transmit FIFO Empty
#define UART_STATUS_RXFF   _BIT(6)       // Receive FIFO Full
#define UART_STATUS_TXFF   _BIT(5)       // Transmit FIFO Full
#define UART_STATUS_RXFE   _BIT(4)       // Receive FIFO Empty
#define UART_STATUS_BUSY   _BIT(3)       // Transmitter Busy
#define UART_STATUS_DCD    _BIT(2)       // Data Carrier Detect
#define UART_STATUS_DSR    _BIT(1)       // Data Set Ready
#define UART_STATUS_CTS    _BIT(0)       // Clear To Send

/***********************************************************************    
 * UART Interrupt Registers Bit Fields
 * intraw, inte, intr
 **********************************************************************/
#define UART_INTR_RTI    _BIT(3)         // Receive Timeout Interrupt
#define UART_INTR_MI     _BIT(2)         // Modem Interrupt
#define UART_INTR_TI     _BIT(1)         // Transmit Interrupt
#define UART_INTR_RI     _BIT(0)         // Receive Interrupt

#endif /* LH7A400_UART_H */