lh7a400_gpio.h

sharp触摸屏测试代码

/**********************************************************************
 *	$Workfile:   lh7a400_gpio.h  $
 *	$Revision:   1.3  $
 *	$Author:   SuryanG  $
 *	$Date:   Apr 01 2002 17:18:16  $
 *
 *	Project: LH7A400 headers
 *
 *	Description:
 *      This file contains the structure definitions and manifest
 *      constants for the LH7A400 component:
 *      	General Purpose Input/Output controller
 *
 *	References:
 *		(1) Sharp LH7A400 Universal SoC User's Guide
 *
 *  $Log:   P:/PVCS6_6/archives/SOC/IP/LH7A400 IP/LH7A400/lh7a400_gpio.h-arc  $
 * 
 *    Rev 1.3   Apr 01 2002 17:18:16   SuryanG
 * Added legal header.
 * 
 *    Rev 1.2   Jan 10 2002 16:31:36   KovitzP
 * removed PACKED. Added KSCAN helper bits.
 * 
 *    Rev 1.1   Oct 04 2001 15:59:04   BarnettH
 * Changed error in inclusion guard.
 * 
 *    Rev 1.0   Oct 04 2001 14:32:42   BarnettH
 * Initial revision.
 * 
 * SHARP MICROELECTRONICS OF THE AMERICAS MAKES NO REPRESENTATION
 * OR WARRANTIES WITH RESPECT TO THE PERFORMANCE OF THIS SOFTWARE,
 * AND SPECIFICALLY DISCLAIMS ANY RESPONSIBILITY FOR ANY DAMAGES, 
 * SPECIAL OR CONSEQUENTIAL, CONNECTED WITH THE USE OF THIS SOFTWARE.
 *
 * SHARP MICROELECTRONICS OF THE AMERICAS PROVIDES THIS SOFTWARE SOLELY 
 * FOR THE PURPOSE OF SOFTWARE DEVELOPMENT INCORPORATING THE USE OF A 
 * SHARP MICROCONTROLLER OR SYSTEM-ON-CHIP PRODUCT. USE OF THIS SOURCE
 * FILE IMPLIES ACCEPTANCE OF THESE CONDITIONS.
 *
 *	COPYRIGHT (C) 2001 SHARP MICROELECTRONICS OF THE AMERICAS, INC.
 *		CAMAS, WA
 **********************************************************************/

 #ifndef LH7A400_GPIO_H
 #define LH7A400_GPIO_H

#include "SMA_types.h"

/* GPIO Register Structures */ 
typedef struct 
{
	volatile UNS_32	padr;
	volatile UNS_32	pbdr;
	volatile UNS_32	pcdr;
	volatile UNS_32	pddr;
	volatile UNS_32	paddr;
	volatile UNS_32	pbddr;
	volatile UNS_32	pcddr;
	volatile UNS_32	pdddr;
	volatile UNS_32	pedr;
	volatile UNS_32	peddr;
	volatile UNS_32	kscan;
	volatile UNS_32	pinmux;
	volatile UNS_32	pfdr;
	volatile UNS_32	pfddr;
	volatile UNS_32	pgdr;
	volatile UNS_32	pgddr;
	volatile UNS_32	phdr;
	volatile UNS_32	phddr;
	volatile UNS_32	reserved1;
	volatile UNS_32	inttype1;
	volatile UNS_32	inttype2;
	volatile UNS_32	gpiofeoi;
	volatile UNS_32	gpiointen;
	volatile UNS_32	intstatus;
	volatile UNS_32	rawintstatus;
	volatile UNS_32	gpiodb;
	volatile UNS_32	papindr;
	volatile UNS_32	pbpindr;
	volatile UNS_32	pcpindr;
	volatile UNS_32	pdpindr;
	volatile UNS_32	pepindr;
	volatile UNS_32	pfpindr;
	volatile UNS_32	pgpindr;
	volatile UNS_32	phpindr;
} GPIOREGS;

/*
 * The names and usage of bit fields in many of these registers is
 * implementation specific.
 */ 

/**********************************************************************
 * GPIO PINMUX Register
 *********************************************************************/ 
#define GPIO_PINMUX_PEOCON    _BIT(0)
#define GPIO_PINMUX_PDOCON    _BIT(1)
#define GPIO_PINMUX_CODECON   _BIT(2)
#define GPIO_PINMUX_UART3ON   _BIT(3)
#define GPIO_PINMUX_CLK12EN   _BIT(4)
#define GPIO_PINMUX_CLK0EN    _BIT(5)

/**********************************************************************
 * GPIO Port F Interrupts (used for all Port F Interrupt registers)
 *********************************************************************/ 
#define GPIO_PFINT(n)         (_BIT(n)&0xFF)

/**********************************************************************
 * GPIO KSCAN register
 *********************************************************************/ 
#define GPIO_KSCAN_ALL_HIGH   (0)
#define GPIO_KSCAN_ALL_LOW    (1)
#define GPIO_KSCAN_HI_Z       (2)
#define GPIO_KSCAN_COL_ENABLE _BIT(3)

#endif /* LH7A400_GPIO_H */