lh7a404_wdt.h

sharp触摸屏测试代码

/***********************************************************************
 * $Workfile:   lh7a404_wdt.h  $
 * $Revision:   1.0  $
 * $Author:   WellsK  $
 * $Date:   Jun 30 2003 16:28:52  $
 *
 * Project: LH7A404 WDT definitions
 *
 * Description:
 *     This file contains the structure definitions and manifest
 *     constants for LH7A404 component:
 *         Watchdog Timer
 *
 * Revision History:
 * $Log:   //smaicnt2/pvcs/VM/sharpmcu/archives/sharpmcu/software/csps/lh7a404/include/lh7a404_wdt.h-arc  $
 * 
 *    Rev 1.0   Jun 30 2003 16:28:52   WellsK
 * Initial revision.
 * 
 * 
 ***********************************************************************
 * SHARP MICROELECTRONICS OF THE AMERICAS MAKES NO REPRESENTATION
 * OR WARRANTIES WITH RESPECT TO THE PERFORMANCE OF THIS SOFTWARE,
 * AND SPECIFICALLY DISCLAIMS ANY RESPONSIBILITY FOR ANY DAMAGES, 
 * SPECIAL OR CONSEQUENTIAL, CONNECTED WITH THE USE OF THIS SOFTWARE.
 *
 * SHARP MICROELECTRONICS OF THE AMERICAS PROVIDES THIS SOFTWARE SOLELY 
 * FOR THE PURPOSE OF SOFTWARE DEVELOPMENT INCORPORATING THE USE OF A 
 * SHARP MICROCONTROLLER OR SYSTEM-ON-CHIP PRODUCT. USE OF THIS SOURCE
 * FILE IMPLIES ACCEPTANCE OF THESE CONDITIONS.
 *
 * COPYRIGHT (C) 2001 SHARP MICROELECTRONICS OF THE AMERICAS, INC.
 *     CAMAS, WA
 **********************************************************************/

#ifndef LH7A404_WDT_H
#define LH7A404_WDT_H

#include "abl_types.h"
#include "lh7a404_chip.h"

/***********************************************************************
 * Watchdog Timer Module Register Structure
 **********************************************************************/

/* Watchdog Timer Module Register Structure */ 
typedef struct 
{
    volatile UNS_32 wdctlr;  /* WDT Control register */ 
    volatile UNS_32 wdcntr;  /* WDT Counter Reset register */ 
    volatile UNS_32 wdtstat; /* WDT status register */ 
} WDT_REGS_T;

/***********************************************************************
 * WDT control register defines
 **********************************************************************/
#define WDT_CTRL_DISABLE    0x00000000  /* WDT disable */
#define WDT_CTRL_ENABLE     0x00000001  /* WDT enable */
#define WDT_CTRL_RSP_RESET  0x00000000  /* WDT 1rst timeout interrupt */
#define WDT_CTRL_RSP_FIQ    0x00000002  /* WDT 2nd timeout interrupt */
#define WDT_CTRL_FRZ        0x00000008  /* WDT freeze bit */
/* WDT timeout code load macro */
#define WDT_CTRL_TOP(n)     _SBF(4, ((n) & 0xF))
#define WDT_TO_MASK         0x000000F0  /* WDT timeout mask */

/***********************************************************************
 * WDT reset register defines
 **********************************************************************/

#define WDT_WDCNTR          0x1984      /* WDT reset value */

/***********************************************************************
 * WDT status register defines
 **********************************************************************/

#define WDT_WD_NWDFIQ       0x00000080  /* WDT FIQ status mask bit */
#define WDT_WD_NWDRES       0x00000040  /* WDT system reset mask bit */
#define WDT_WD_RSP          0x00000030  /* WDT timeout status mask */

/* Macro pointing to WDT registers */
#define WDTIMER ((WDT_REGS_T *)(WDTIMER_BASE))

#endif /*LH7A404_WDT_H */