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insns that use the pseudo register, looking for the machine-dependentletters such as @samp{d} and @samp{a} that specify classes of registers.The pseudo register is put in whichever class gets the most ``votes''.The constraint letters @samp{g} and @samp{r} also vote: they vote infavor of a general register. The machine description says which registersare considered general.Of course, on some machines all registers are equivalent, and no registerclasses are defined. Then none of this complexity is relevant.@end ifset@node Modifiers@subsection Constraint Modifier Characters@cindex modifiers in constraints@cindex constraint modifier characters@c prevent bad page break with this lineHere are constraint modifier characters.@table @samp@cindex @samp{=} in constraint@item =Means that this operand is write-only for this instruction: the previousvalue is discarded and replaced by output data.@cindex @samp{+} in constraint@item +Means that this operand is both read and written by the instruction.When the compiler fixes up the operands to satisfy the constraints,it needs to know which operands are inputs to the instruction andwhich are outputs from it. @samp{=} identifies an output; @samp{+}identifies an operand that is both input and output; all other operandsare assumed to be input only.@cindex @samp{&} in constraint@item &Means (in a particular alternative) that this operand is writtenbefore the instruction is finished using the input operands.Therefore, this operand may not lie in a register that is used as aninput operand or as part of any memory address.@samp{&} applies only to the alternative in which it is written. Inconstraints with multiple alternatives, sometimes one alternativerequires @samp{&} while others do not. See, for example, the@samp{movdf} insn of the 68000.@samp{&} does not obviate the need to write @samp{=}.@cindex @samp{%} in constraint@item %Declares the instruction to be commutative for this operand and thefollowing operand. This means that the compiler may interchange thetwo operands if that is the cheapest way to make all operands fit theconstraints.@ifset INTERNALSThis is often used in patterns for addition instructionsthat really have only two operands: the result must go in one of thearguments. Here for example, is how the 68000 halfword-addinstruction is defined:@smallexample(define_insn "addhi3" [(set (match_operand:HI 0 "general_operand" "=m,r") (plus:HI (match_operand:HI 1 "general_operand" "%0,0") (match_operand:HI 2 "general_operand" "di,g")))] @dots{})@end smallexample@end ifset@cindex @samp{#} in constraint@item #Says that all following characters, up to the next comma, are to beignored as a constraint. They are significant only for choosingregister preferences.@ifset INTERNALS@cindex @samp{*} in constraint@item *Says that the following character should be ignored when choosingregister preferences. @samp{*} has no effect on the meaning of theconstraint as a constraint, and no effect on reloading.Here is an example: the 68000 has an instruction to sign-extend ahalfword in a data register, and can also sign-extend a value bycopying it into an address register. While either kind of register isacceptable, the constraints on an address-register destination areless strict, so it is best if register allocation makes an addressregister its goal. Therefore, @samp{*} is used so that the @samp{d}constraint letter (for data register) is ignored when computingregister preferences.@smallexample(define_insn "extendhisi2" [(set (match_operand:SI 0 "general_operand" "=*d,a") (sign_extend:SI (match_operand:HI 1 "general_operand" "0,g")))] @dots{})@end smallexample@end ifset@end table@node Machine Constraints@subsection Constraints for Particular Machines@cindex machine specific constraints@cindex constraints, machine specificWhenever possible, you should use the general-purpose constraint lettersin @code{asm} arguments, since they will convey meaning more readily topeople reading your code. Failing that, use the constraint lettersthat usually have very similar meanings across architectures. The mostcommonly used constraints are @samp{m} and @samp{r} (for memory andgeneral-purpose registers respectively; @pxref{Simple Constraints}), and@samp{I}, usually the letter indicating the most commonimmediate-constant format.For each machine architecture, the @file{config/@var{machine}.h} filedefines additional constraints. These constraints are used by thecompiler itself for instruction generation, as well as for @code{asm}statements; therefore, some of the constraints are not particularlyinteresting for @code{asm}. The constraints are defined through thesemacros:@table @code@item REG_CLASS_FROM_LETTERRegister class constraints (usually lower case).@item CONST_OK_FOR_LETTER_PImmediate constant constraints, for non-floating point constants ofword size or smaller precision (usually upper case).@item CONST_DOUBLE_OK_FOR_LETTER_PImmediate constant constraints, for all floating point constants and forconstants of greater than word size precision (usually upper case).@item EXTRA_CONSTRAINTSpecial cases of registers or memory. This macro is not required, andis only defined for some machines.@end tableInspecting these macro definitions in the compiler source for yourmachine is the best way to be certain you have the right constraints.However, here is a summary of the machine-dependent constraintsavailable on some particular machines.@table @emph@item ARM family---@file{arm.h}@table @code@item fFloating-point register@item FOne of the floating-point constants 0.0, 0.5, 1.0, 2.0, 3.0, 4.0, 5.0or 10.0@item GFloating-point constant that would satisfy the constraint @samp{F} if itwere negated@item IInteger that is valid as an immediate operand in a data processinginstruction. That is, an integer in the range 0 to 255 rotated by amultiple of 2@item JInteger in the range -4095 to 4095@item KInteger that satisfies constraint @samp{I} when inverted (ones complement)@item LInteger that satisfies constraint @samp{I} when negated (twos complement)@item MInteger in the range 0 to 32@item QA memory reference where the exact address is in a single register (`@samp{m}' is preferable for @code{asm} statements)@item RAn item in the constant pool@item SA symbol in the text segment of the current file@end table@item AMD 29000 family---@file{a29k.h}@table @code@item lLocal register 0@item bByte Pointer (@samp{BP}) register@item q@samp{Q} register@item hSpecial purpose register@item AFirst accumulator register@item aOther accumulator register@item fFloating point register@item IConstant greater than 0, less than 0x100@item JConstant greater than 0, less than 0x10000@item KConstant whose high 24 bits are on (1)@item L16 bit constant whose high 8 bits are on (1)@item M32 bit constant whose high 16 bits are on (1)@item N32 bit negative constant that fits in 8 bits@item OThe constant 0x80000000 or, on the 29050, any 32 bit constantwhose low 16 bits are 0.@item P16 bit negative constant that fits in 8 bits@item G@itemx HA floating point constant (in @code{asm} statements, use the machineindependent @samp{E} or @samp{F} instead)@end table@item IBM RS6000---@file{rs6000.h}@table @code@item bAddress base register@item fFloating point register@item h@samp{MQ}, @samp{CTR}, or @samp{LINK} register@item q@samp{MQ} register@item c@samp{CTR} register@item l@samp{LINK} register@item x@samp{CR} register (condition register) number 0@item y@samp{CR} register (condition register)@item ISigned 16 bit constant@item JConstant whose low 16 bits are 0@item KConstant whose high 16 bits are 0@item LConstant suitable as a mask operand@item MConstant larger than 31@item NExact power of 2@item OZero@item PConstant whose negation is a signed 16 bit constant@item GFloating point constant that can be loaded into a register with oneinstruction per word@item QMemory operand that is an offset from a register (@samp{m} is preferablefor @code{asm} statements)@end table@item Intel 386---@file{i386.h}@table @code@item q@samp{a}, @code{b}, @code{c}, or @code{d} register@item A@samp{a}, or @code{d} register (for 64-bit ints)@item fFloating point register@item tFirst (top of stack) floating point register@item uSecond floating point register@item a@samp{a} register@item b@samp{b} register@item c@samp{c} register@item d@samp{d} register@item D@samp{di} register@item S@samp{si} register@item IConstant in range 0 to 31 (for 32 bit shifts)@item JConstant in range 0 to 63 (for 64 bit shifts)@item K@samp{0xff}@item L@samp{0xffff}@item M0, 1, 2, or 3 (shifts for @code{lea} instruction)@item NConstant in range 0 to 255 (for @code{out} instruction)@item GStandard 80387 floating point constant@end table@item Intel 960---@file{i960.h}
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