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📄 sparc.h

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/* Definitions of target machine for GNU compiler, for Sun SPARC.   Copyright (C) 1987, 88, 89, 92, 94, 1995 Free Software Foundation, Inc.   Contributed by Michael Tiemann (tiemann@cygnus.com).   64 bit SPARC V9 support by Michael Tiemann, Jim Wilson, and Doug Evans,   at Cygnus Support.This file is part of GNU CC.GNU CC is free software; you can redistribute it and/or modifyit under the terms of the GNU General Public License as published bythe Free Software Foundation; either version 2, or (at your option)any later version.GNU CC is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY; without even the implied warranty ofMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See theGNU General Public License for more details.You should have received a copy of the GNU General Public Licensealong with GNU CC; see the file COPYING.  If not, write tothe Free Software Foundation, 59 Temple Place - Suite 330,Boston, MA 02111-1307, USA.  *//* Note that some other tm.h files include this one and then override   many of the definitions that relate to assembler syntax.  *//* Sparc64 support has been added by trying to allow for a day when one   compiler can handle both v8 and v9.  There are a few cases where this   isn't doable, but keep them to a minimum!  Two macros are used to help out:   TARGET_V9 is used to select (at runtime) !v9-ness or v9-ness.   SPARCV9 is defined when compiling for sparc64 only.   In places where it is possible to choose between the two at runtime, use   TARGET_V9.  In places where it is currently not possible to select   between the two at runtime use SPARCV9.  Again, keep uses of SPARCV9 to a   minimum.  No attempt is made to support both v8 and v9 in the v9 compiler.   If a combination v8/v9 compiler is too slow, it should always be possible   to #define TARGET_V9 as 0 (and potentially other v9-only options), and   #undef SPARCV9.  *//* What architecture we're compiling for.  This must coincide with the   `arch_type' attribute in the .md file.  The names were chosen to avoid   potential misunderstandings with the various 32 bit flavors (v7, v8, etc.):   if we used ARCH_V9 then we'd want to use something like ARCH_V8 but that   could be misleading and ARCH_NOTV9 sounds klunky.  */enum arch_type { ARCH_32BIT, ARCH_64BIT };extern enum arch_type sparc_arch_type;/* Names to predefine in the preprocessor for this target machine.  *//* ??? The GCC_NEW_VARARGS macro is now obsolete, because gcc always uses   the right varags.h file when bootstrapping.  */#ifdef SPARCV9#define CPP_PREDEFINES \  "-Dsparc -Dsun -Dunix -D__sparc_v9__ \   -Asystem(unix) -Asystem(bsd) -Acpu(sparc64) -Amachine(sparc64)"#else#define CPP_PREDEFINES \  "-Dsparc -Dsun -Dunix -D__GCC_NEW_VARARGS__ \   -Asystem(unix) -Asystem(bsd) -Acpu(sparc) -Amachine(sparc)"#endif#define LIB_SPEC "%{!shared:%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p} %{g:-lg}}"/* Provide required defaults for linker -e and -d switches.  */#define LINK_SPEC \ "%{!shared:%{!nostdlib:%{!r*:%{!e*:-e start}}} -dc -dp} %{static:-Bstatic} \  %{assert*} %{shared:-assert pure-text}"/* Special flags to the Sun-4 assembler when using pipe for input.  */#define ASM_SPEC \  " %| %{R} %{!pg:%{!p:%{fpic:-k} %{fPIC:-k}}} %{keep-local-as-symbols:-L}"/* Define macros to distinguish architectures.  */#ifdef SPARCV9#define CPP_SPEC "\%{mint64:-D__INT_MAX__=9223372036854775807LL -D__LONG_MAX__=9223372036854775807LL} \%{mlong64:-D__LONG_MAX__=9223372036854775807LL} \"#else#define CPP_SPEC "\%{msparclite:-D__sparclite__} \%{mf930:-D__sparclite__} %{mf934:-D__sparclite__} \%{mv8:-D__sparc_v8__} \%{msupersparc:-D__supersparc__ -D__sparc_v8__}	\"#endif/* Prevent error on `-sun4' and `-target sun4' options.  *//* This used to translate -dalign to -malign, but that is no good   because it can't turn off the usual meaning of making debugging dumps.  */#define CC1_SPEC "%{sun4:} %{target:}"#ifdef SPARCV9#define PTRDIFF_TYPE "long long int"#define SIZE_TYPE "long long unsigned int"#else#define PTRDIFF_TYPE "int"/* In 2.4 it should work to delete this.   #define SIZE_TYPE "int"  */#endif/* ??? This should be 32 bits for v9 but what can we do?  */#define WCHAR_TYPE "short unsigned int"#define WCHAR_TYPE_SIZE 16#define MAX_WCHAR_TYPE_SIZE 16/* Show we can debug even without a frame pointer.  */#define CAN_DEBUG_WITHOUT_FP/* To make profiling work with -f{pic,PIC}, we need to emit the profiling   code into the rtl.  Also, if we are profiling, we cannot eliminate   the frame pointer (because the return address will get smashed).  */void sparc_override_options ();#define OVERRIDE_OPTIONS \  do {									\    if (profile_flag || profile_block_flag)				\      {									\	if (flag_pic)							\	  {								\	    char *pic_string = (flag_pic == 1) ? "-fpic" : "-fPIC";	\	    warning ("%s and profiling conflict: disabling %s",		\		     pic_string, pic_string);				\	    flag_pic = 0;						\	  }								\	flag_omit_frame_pointer = 0;					\      }									\    SUBTARGET_OVERRIDE_OPTIONS;						\    sparc_override_options ();						\  } while (0)/* This is meant to be redefined in the host dependent files.  */#define SUBTARGET_OVERRIDE_OPTIONS/* These compiler options take an argument.  We ignore -target for now.  */#define WORD_SWITCH_TAKES_ARG(STR)				\ (DEFAULT_WORD_SWITCH_TAKES_ARG (STR)				\  || !strcmp (STR, "target") || !strcmp (STR, "assert"))/* Print subsidiary information on the compiler version in use.  */#define TARGET_VERSION fprintf (stderr, " (sparc)");/* Generate DBX debugging information.  */#define DBX_DEBUGGING_INFO/* Run-time compilation parameters selecting different hardware subsets.  */extern int target_flags;/* Nonzero if we should generate code to use the fpu.  */#define MASK_FPU 1#define TARGET_FPU (target_flags & MASK_FPU)/* Nonzero if we should use FUNCTION_EPILOGUE.  Otherwise, we   use fast return insns, but lose some generality.  */#define MASK_EPILOGUE 2#define TARGET_EPILOGUE (target_flags & MASK_EPILOGUE)/* Nonzero if we should assume that double pointers might be unaligned.   This can happen when linking gcc compiled code with other compilers,   because the ABI only guarantees 4 byte alignment.  */#define MASK_UNALIGNED_DOUBLES 4#define TARGET_UNALIGNED_DOUBLES (target_flags & MASK_UNALIGNED_DOUBLES)/* ??? Bits 0x18 are currently unused.  *//* Nonzero means we should schedule code for the TMS390Z55 SuperSparc chip.  */#define MASK_SUPERSPARC 0x20#define TARGET_SUPERSPARC (target_flags & MASK_SUPERSPARC)/* Nonzero means that we should generate code for a v8 sparc.  */#define MASK_V8 0x40#define TARGET_V8 (target_flags & MASK_V8)/* Nonzero means that we should generate code for a sparclite.   This enables the sparclite specific instructions, but does not affect   whether FPU instructions are emitted.  */#define MASK_SPARCLITE 0x80#define TARGET_SPARCLITE (target_flags & MASK_SPARCLITE)/* Nonzero means that we should generate code using a flat register window   model, i.e. no save/restore instructions are generated, in the most   efficient manner.  This code is not compatible with normal sparc code.  *//* This is not a user selectable option yet, because it requires changes   that are not yet switchable via command line arguments.  *//* ??? This flag is deprecated and may disappear at some point.  */#define MASK_FRW 0x100#define TARGET_FRW (target_flags & MASK_FRW)/* Nonzero means that we should generate code using a flat register window   model, i.e. no save/restore instructions are generated, but which is   compatible with normal sparc code.   This is the same as above, except   that the frame pointer is %i7 instead of %fp.  *//* ??? This use to be named TARGET_FRW_COMPAT.  At some point TARGET_FRW will   go away, but until that time only use this one when necessary.   -mflat sets both.  */#define MASK_FLAT 0x200#define TARGET_FLAT (target_flags & MASK_FLAT)/* Nonzero means use the registers that the Sparc ABI reserves for   application software.  This is the default for v8, but not v9.  */#define MASK_APP_REGS 0x400#define TARGET_APP_REGS (target_flags & MASK_APP_REGS)/*  Option to select how quad word floating point is implemented.    When TARGET_HARD_QUAD is true, we use the hardware quad instructions.    Otherwise, we use the SPARC ABI quad library functions.  */#define MASK_HARD_QUAD 0x800#define TARGET_HARD_QUAD (target_flags & MASK_HARD_QUAD)/* Nonzero if we're compiling for 64 bit sparc.  */#define MASK_V9 0x1000#define TARGET_V9 (target_flags & MASK_V9)/* Nonzero if ints are 64 bits.   This automatically implies longs are 64 bits too.   This option is for v9 only.  */#define MASK_INT64 0x2000#define TARGET_INT64 (target_flags & MASK_INT64)/* Nonzero if longs are 64 bits.   This option is for v9 only.  */#define MASK_LONG64 0x4000#define TARGET_LONG64 (target_flags & MASK_LONG64)/* Nonzero if pointers are 64 bits.   This is not a user selectable option, though it may be one day -   so it is used to determine pointer size instead of an architecture flag.  */#define MASK_PTR64 0x8000#define TARGET_PTR64 (target_flags & MASK_PTR64)/* Nonzero if we are generating code to be tested in a 32 bit environment.   Hence, we assume the upper 32 bits of symbolic addresses are zero, and   avoid generating %uhi and %ulo terms.   Pointers are still 64 bits though!  This option is for v9 only.  *//* ??? This option is deprecated.  Try to use -mmedlow.  */#define MASK_ENV32 0x10000#define TARGET_ENV32 (target_flags & MASK_ENV32)/* Memory models.   Two memory models are supported:   TARGET_MEDLOW: 32 bit address space, top 32 bits = 0                  (pointers still 64 bits)   TARGET_MEDANY: 32 bit address space, data segment loaded anywhere                  (use %g4 as offset).   TARGET_FULLANY: not supported yet.   These options are for v9 only.  All mask values are nonzero so the v8   compiler can assume this stuff won't interfere.  */#define MASK_MEDLOW 0x20000#define MASK_MEDANY 0x40000#define MASK_FULLANY 0x60000#define MASK_CODE_MODEL (MASK_MEDLOW + MASK_MEDANY)#define TARGET_MEDLOW ((target_flags & MASK_CODE_MODEL) == MASK_MEDLOW)#define TARGET_MEDANY ((target_flags & MASK_CODE_MODEL) == MASK_MEDANY)#define TARGET_FULLANY ((target_flags & MASK_CODE_MODEL) == MASK_FULLANY)/* ??? There are hardcoded references to this reg in the .md file.  */#define MEDANY_BASE_REG "%g4"/* Non-zero means use a stack bias of 2047.  Stack offsets are obtained by   adding 2047 to %sp.  This option is for v9 only and is the default.  */#define MASK_STACK_BIAS 0x80000#define TARGET_STACK_BIAS (target_flags & MASK_STACK_BIAS)/* Macro to define tables used to set the flags.   This is a list in braces of pairs in braces,   each pair being { "NAME", VALUE }   where VALUE is the bits to set or minus the bits to clear.   An empty string NAME is used to identify the default VALUE.  *//* The Fujitsu MB86930 is the original sparclite chip, with no fpu.   The Fujitsu MB86934 is the recent sparclite chip, with an fpu.   We use -mf930 and -mf934 options to choose which.   ??? These should perhaps be -mcpu= options.  */#define TARGET_SWITCHES  \  { {"fpu", MASK_FPU},			\    {"no-fpu", -MASK_FPU},		\    {"hard-float", MASK_FPU},		\    {"soft-float", -MASK_FPU},		\    {"epilogue", MASK_EPILOGUE},	\    {"no-epilogue", -MASK_EPILOGUE},	\    {"unaligned-doubles", MASK_UNALIGNED_DOUBLES}, \    {"no-unaligned-doubles", -MASK_UNALIGNED_DOUBLES}, \    {"supersparc", MASK_SUPERSPARC+MASK_V8},	\    {"cypress", -MASK_SUPERSPARC-MASK_V8},	\    {"v8", MASK_V8},			\    {"no-v8", -MASK_V8},		\    {"sparclite", MASK_SPARCLITE},	\    {"no-sparclite", -MASK_SPARCLITE},	\    {"f930", MASK_SPARCLITE},		\    {"f930", -MASK_FPU},		\    {"f934", MASK_SPARCLITE},		\    {"flat", MASK_FRW+MASK_FLAT},	\    {"no-flat", -(MASK_FRW+MASK_FLAT)},	\    {"app-regs", MASK_APP_REGS},	\    {"no-app-regs", -MASK_APP_REGS},	\    {"hard-quad-float", MASK_HARD_QUAD}, \    {"soft-quad-float", -MASK_HARD_QUAD}, \    SUBTARGET_SWITCHES			\    V9_SWITCHES				\    { "", TARGET_DEFAULT}}#define TARGET_DEFAULT (MASK_APP_REGS + MASK_EPILOGUE + MASK_FPU)/* This is meant to be redefined in the host dependent files */#define SUBTARGET_SWITCHES/* ??? Until we support a combination v8/v9 compiler, the v9 specific options   are only defined for the v9 compiler.  */#ifdef SPARCV9#define V9_SWITCHES \/*  {"v9", MASK_V9}, */			\    {"int64", MASK_INT64+MASK_LONG64},	\    {"int32", -MASK_INT64},		\    {"int32", MASK_LONG64},		\    {"long64", -MASK_INT64},		\    {"long64", MASK_LONG64},		\    {"long32", -(MASK_INT64+MASK_LONG64)}, \/*  {"ptr64", MASK_PTR64}, */		\/*  {"ptr32", -MASK_PTR64}, */		\    {"stack-bias", MASK_STACK_BIAS},	\    {"no-stack-bias", -MASK_STACK_BIAS}, \    {"medlow", -MASK_CODE_MODEL},	\    {"medlow", MASK_MEDLOW},		\    {"medany", -MASK_CODE_MODEL},	\    {"medany", MASK_MEDANY},#else#define V9_SWITCHES#endif

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