📄 pdp11.c
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switch (length) { case 1: strcpy(buf, pos); strcat(buf, " %l0"); return buf; case 3: sprintf(buf, "%s JMP_%d\n\tjmp %%l0\nJMP_%d:", neg, x, x); x++; return buf; default: abort(); } }voidnotice_update_cc_on_set(exp, insn) rtx exp; rtx insn;{ if (GET_CODE (SET_DEST (exp)) == CC0) { cc_status.flags = 0; cc_status.value1 = SET_DEST (exp); cc_status.value2 = SET_SRC (exp); /* if (GET_MODE(SET_SRC(exp)) == DFmode) cc_status.flags |= CC_IN_FPU;*/ } else if ((GET_CODE (SET_DEST (exp)) == REG || GET_CODE (SET_DEST (exp)) == MEM) && GET_CODE (SET_SRC (exp)) != PC && (GET_MODE (SET_DEST(exp)) == HImode || GET_MODE (SET_DEST(exp)) == QImode) && (GET_CODE (SET_SRC(exp)) == PLUS || GET_CODE (SET_SRC(exp)) == MINUS || GET_CODE (SET_SRC(exp)) == AND || GET_CODE (SET_SRC(exp)) == IOR || GET_CODE (SET_SRC(exp)) == XOR || GET_CODE (SET_SRC(exp)) == NOT || GET_CODE (SET_SRC(exp)) == NEG || GET_CODE (SET_SRC(exp)) == REG || GET_CODE (SET_SRC(exp)) == MEM)) { cc_status.flags = 0; cc_status.value1 = SET_SRC (exp); cc_status.value2 = SET_DEST (exp); if (cc_status.value1 && GET_CODE (cc_status.value1) == REG && cc_status.value2 && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) cc_status.value2 = 0; if (cc_status.value1 && GET_CODE (cc_status.value1) == MEM && cc_status.value2 && GET_CODE (cc_status.value2) == MEM) cc_status.value2 = 0; } else if (GET_CODE (SET_SRC (exp)) == CALL) { CC_STATUS_INIT; } else if (GET_CODE (SET_DEST (exp)) == REG) /* what's this ? */ { if ((cc_status.value1 && reg_overlap_mentioned_p (SET_DEST (exp), cc_status.value1))) cc_status.value1 = 0; if ((cc_status.value2 && reg_overlap_mentioned_p (SET_DEST (exp), cc_status.value2))) cc_status.value2 = 0; } else if (SET_DEST(exp) == pc_rtx) { /* jump */ } else /* if (GET_CODE (SET_DEST (exp)) == MEM) */ { /* the last else is a bit paranoiac, but since nearly all instructions play with condition codes, it's reasonable! */ CC_STATUS_INIT; /* paranoia*/ } }int simple_memory_operand(op, mode) rtx op; enum machine_mode mode;{ rtx addr, plus0, plus1; int offset = 0; /* Eliminate non-memory operations */ if (GET_CODE (op) != MEM) return FALSE;#if 0 /* dword operations really put out 2 instructions, so eliminate them. */ if (GET_MODE_SIZE (GET_MODE (op)) > (HAVE_64BIT_P () ? 8 : 4)) return FALSE;#endif /* Decode the address now. */ indirection: addr = XEXP (op, 0); switch (GET_CODE (addr)) { case REG: /* (R0) - no extra cost */ return 1; case PRE_DEC: case POST_INC: /* -(R0), (R0)+ - cheap! */ return 0; case MEM: /* cheap - is encoded in addressing mode info! -- except for @(R0), which has to be @0(R0) !!! */ if (GET_CODE (XEXP (addr, 0)) == REG) return 0; op=addr; goto indirection; case CONST_INT: case LABEL_REF: case CONST: case SYMBOL_REF: /* @#address - extra cost */ return 0; case PLUS: /* X(R0) - extra cost */ return 0; } return FALSE;}/* * output a block move: * * operands[0] ... to * operands[1] ... from * operands[2] ... length * operands[3] ... alignment * operands[4] ... scratch register */ char *output_block_move(operands) rtx *operands;{ static int count = 0; char buf[200]; if (GET_CODE(operands[2]) == CONST_INT && TARGET_TIME) { if (INTVAL(operands[2]) < 16 && INTVAL(operands[3]) == 1) { register int i; for (i = 1; i <= INTVAL(operands[2]); i++) output_asm_insn("movb (%1)+, (%0)+", operands); return ""; } else if (INTVAL(operands[2]) < 32) { register int i; for (i = 1; i <= INTVAL(operands[2])/2; i++) output_asm_insn("mov (%1)+, (%0)+", operands); /* may I assume that moved quantity is multiple of alignment ??? I HOPE SO ! */ return ""; } /* can do other clever things, maybe... */ } if (CONSTANT_P(operands[2]) ) { /* just move count to scratch */ output_asm_insn("mov %2, %4", operands); } else { /* just clobber the register */ operands[4] = operands[2]; } /* switch over alignment */ switch (INTVAL(operands[3])) { case 1: /* x: movb (%1)+, (%0)+ if (TARGET_45) sob %4,x else dec %4 bgt x */ sprintf(buf, "\nmovestrhi%d:", count); output_asm_insn(buf, NULL); output_asm_insn("movb (%1)+, (%0)+", operands); if (TARGET_45) { sprintf(buf, "sob %%4, movestrhi%d", count); output_asm_insn(buf, operands); } else { output_asm_insn("dec %4", operands); sprintf(buf, "bgt movestrhi%d", count); output_asm_insn(buf, NULL); } count ++; break; case 2: /* asr %4 x: mov (%1)+, (%0)+ if (TARGET_45) sob %4, x else dec %4 bgt x */ generate_compact_code: output_asm_insn("asr %4", operands); sprintf(buf, "\nmovestrhi%d:", count); output_asm_insn(buf, NULL); output_asm_insn("mov (%1)+, (%0)+", operands); if (TARGET_45) { sprintf(buf, "sob %%4, movestrhi%d", count); output_asm_insn(buf, operands); } else { output_asm_insn("dec %4", operands); sprintf(buf, "bgt movestrhi%d", count); output_asm_insn(buf, NULL); } count ++; break; case 4: /* asr %4 asr %4 x: mov (%1)+, (%0)+ mov (%1)+, (%0)+ if (TARGET_45) sob %4, x else dec %4 bgt x */ if (TARGET_SPACE) goto generate_compact_code; output_asm_insn("asr %4", operands); output_asm_insn("asr %4", operands); sprintf(buf, "\nmovestrhi%d:", count); output_asm_insn(buf, NULL); output_asm_insn("mov (%1)+, (%0)+", operands); output_asm_insn("mov (%1)+, (%0)+", operands); if (TARGET_45) { sprintf(buf, "sob %%4, movestrhi%d", count); output_asm_insn(buf, operands); } else { output_asm_insn("dec %4", operands); sprintf(buf, "bgt movestrhi%d", count); output_asm_insn(buf, NULL); } count ++; break; default: /* asr %4 asr %4 asr %4 x: mov (%1)+, (%0)+ mov (%1)+, (%0)+ mov (%1)+, (%0)+ mov (%1)+, (%0)+ if (TARGET_45) sob %4, x else dec %4 bgt x */ if (TARGET_SPACE) goto generate_compact_code; output_asm_insn("asr %4", operands); output_asm_insn("asr %4", operands); output_asm_insn("asr %4", operands); sprintf(buf, "\nmovestrhi%d:", count); output_asm_insn(buf, NULL); output_asm_insn("mov (%1)+, (%0)+", operands); output_asm_insn("mov (%1)+, (%0)+", operands); output_asm_insn("mov (%1)+, (%0)+", operands); output_asm_insn("mov (%1)+, (%0)+", operands); if (TARGET_45) { sprintf(buf, "sob %%4, movestrhi%d", count); output_asm_insn(buf, operands); } else { output_asm_insn("dec %4", operands); sprintf(buf, "bgt movestrhi%d", count); output_asm_insn(buf, NULL); } count ++; break; ; } return "";}/* for future use */intcomparison_operator_index(op) rtx op;{ switch (GET_CODE(op)) { case NE: return 0; case EQ: return 1; case GE: return 2; case GT: return 3; case LE: return 4; case LT: return 5; case GEU: return 6; case GTU: return 7; case LEU: return 8; case LTU: return 9; default: return -1; }} /* tests whether the rtx is a comparison operator */intcomp_operator (op, mode) rtx op; enum machine_mode mode;{ return comparison_operator_index(op) >= 0;} intlegitimate_address_p (mode, address) enum machine_mode mode; rtx address;{/* #define REG_OK_STRICT */ GO_IF_LEGITIMATE_ADDRESS(mode, address, win); return 0; win: return 1;/* #undef REG_OK_STRICT */}
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