📄 m68k.c
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/* Make any unoffsettable addresses point at high-numbered word. */ if (addreg0) output_asm_insn ("addq%.l %#4,%0", &addreg0); if (addreg1) output_asm_insn ("addq%.l %#4,%0", &addreg1); /* Do that word. */ output_asm_insn (singlemove_string (latehalf), latehalf); /* Undo the adds we just did. */ if (addreg0) { if (size == 12) output_asm_insn ("subq%.l %#8,%0", &addreg0); else output_asm_insn ("subq%.l %#4,%0", &addreg0); } if (addreg1) { if (size == 12) output_asm_insn ("subq%.l %#8,%0", &addreg1); else output_asm_insn ("subq%.l %#4,%0", &addreg1); } return "";}/* Return a REG that occurs in ADDR with coefficient 1. ADDR can be effectively incremented by incrementing REG. */static rtxfind_addr_reg (addr) rtx addr;{ while (GET_CODE (addr) == PLUS) { if (GET_CODE (XEXP (addr, 0)) == REG) addr = XEXP (addr, 0); else if (GET_CODE (XEXP (addr, 1)) == REG) addr = XEXP (addr, 1); else if (CONSTANT_P (XEXP (addr, 0))) addr = XEXP (addr, 1); else if (CONSTANT_P (XEXP (addr, 1))) addr = XEXP (addr, 0); else abort (); } if (GET_CODE (addr) == REG) return addr; abort ();}/* Store in cc_status the expressions that the condition codes will describe after execution of an instruction whose pattern is EXP. Do not alter them if the instruction would not alter the cc's. *//* On the 68000, all the insns to store in an address register fail to set the cc's. However, in some cases these instructions can make it possibly invalid to use the saved cc's. In those cases we clear out some or all of the saved cc's so they won't be used. */notice_update_cc (exp, insn) rtx exp; rtx insn;{ /* If the cc is being set from the fpa and the expression is not an explicit floating point test instruction (which has code to deal with this), reinit the CC. */ if (((cc_status.value1 && FPA_REG_P (cc_status.value1)) || (cc_status.value2 && FPA_REG_P (cc_status.value2))) && !(GET_CODE (exp) == PARALLEL && GET_CODE (XVECEXP (exp, 0, 0)) == SET && XEXP (XVECEXP (exp, 0, 0), 0) == cc0_rtx)) { CC_STATUS_INIT; } else if (GET_CODE (exp) == SET) { if (GET_CODE (SET_SRC (exp)) == CALL) { CC_STATUS_INIT; } else if (ADDRESS_REG_P (SET_DEST (exp))) { if (cc_status.value1 && reg_overlap_mentioned_p (SET_DEST (exp), cc_status.value1)) cc_status.value1 = 0; if (cc_status.value2 && reg_overlap_mentioned_p (SET_DEST (exp), cc_status.value2)) cc_status.value2 = 0; } else if (!FP_REG_P (SET_DEST (exp)) && SET_DEST (exp) != cc0_rtx && (FP_REG_P (SET_SRC (exp)) || GET_CODE (SET_SRC (exp)) == FIX || GET_CODE (SET_SRC (exp)) == FLOAT_TRUNCATE || GET_CODE (SET_SRC (exp)) == FLOAT_EXTEND)) { CC_STATUS_INIT; } /* A pair of move insns doesn't produce a useful overall cc. */ else if (!FP_REG_P (SET_DEST (exp)) && !FP_REG_P (SET_SRC (exp)) && GET_MODE_SIZE (GET_MODE (SET_SRC (exp))) > 4 && (GET_CODE (SET_SRC (exp)) == REG || GET_CODE (SET_SRC (exp)) == MEM || GET_CODE (SET_SRC (exp)) == CONST_DOUBLE)) { CC_STATUS_INIT; } else if (GET_CODE (SET_SRC (exp)) == CALL) { CC_STATUS_INIT; } else if (XEXP (exp, 0) != pc_rtx) { cc_status.flags = 0; cc_status.value1 = XEXP (exp, 0); cc_status.value2 = XEXP (exp, 1); } } else if (GET_CODE (exp) == PARALLEL && GET_CODE (XVECEXP (exp, 0, 0)) == SET) { if (ADDRESS_REG_P (XEXP (XVECEXP (exp, 0, 0), 0))) CC_STATUS_INIT; else if (XEXP (XVECEXP (exp, 0, 0), 0) != pc_rtx) { cc_status.flags = 0; cc_status.value1 = XEXP (XVECEXP (exp, 0, 0), 0); cc_status.value2 = XEXP (XVECEXP (exp, 0, 0), 1); } } else CC_STATUS_INIT; if (cc_status.value2 != 0 && ADDRESS_REG_P (cc_status.value2) && GET_MODE (cc_status.value2) == QImode) CC_STATUS_INIT; if (cc_status.value2 != 0 && !(cc_status.value1 && FPA_REG_P (cc_status.value1))) switch (GET_CODE (cc_status.value2)) { case PLUS: case MINUS: case MULT: case DIV: case UDIV: case MOD: case UMOD: case NEG: case ASHIFT: case ASHIFTRT: case LSHIFTRT: case ROTATE: case ROTATERT: if (GET_MODE (cc_status.value2) != VOIDmode) cc_status.flags |= CC_NO_OVERFLOW; break; case ZERO_EXTEND: /* (SET r1 (ZERO_EXTEND r2)) on this machine ends with a move insn moving r2 in r2's mode. Thus, the cc's are set for r2. This can set N bit spuriously. */ cc_status.flags |= CC_NOT_NEGATIVE; } if (cc_status.value1 && GET_CODE (cc_status.value1) == REG && cc_status.value2 && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) cc_status.value2 = 0; if (((cc_status.value1 && FP_REG_P (cc_status.value1)) || (cc_status.value2 && FP_REG_P (cc_status.value2))) && !((cc_status.value1 && FPA_REG_P (cc_status.value1)) || (cc_status.value2 && FPA_REG_P (cc_status.value2)))) cc_status.flags = CC_IN_68881;}char *output_move_const_double (operands) rtx *operands;{#ifdef SUPPORT_SUN_FPA if (TARGET_FPA && FPA_REG_P (operands[0])) { int code = standard_sun_fpa_constant_p (operands[1]); if (code != 0) { static char buf[40]; sprintf (buf, "fpmove%%.d %%%%%d,%%0", code & 0x1ff); return buf; } return "fpmove%.d %1,%0"; } else#endif { int code = standard_68881_constant_p (operands[1]); if (code != 0) { static char buf[40]; sprintf (buf, "fmovecr %%#0x%x,%%0", code & 0xff); return buf; } return "fmove%.d %1,%0"; }}char *output_move_const_single (operands) rtx *operands;{#ifdef SUPPORT_SUN_FPA if (TARGET_FPA) { int code = standard_sun_fpa_constant_p (operands[1]); if (code != 0) { static char buf[40]; sprintf (buf, "fpmove%%.s %%%%%d,%%0", code & 0x1ff); return buf; } return "fpmove%.s %1,%0"; } else#endif /* defined SUPPORT_SUN_FPA */ { int code = standard_68881_constant_p (operands[1]); if (code != 0) { static char buf[40]; sprintf (buf, "fmovecr %%#0x%x,%%0", code & 0xff); return buf; } return "fmove%.s %f1,%0"; }}/* Return nonzero if X, a CONST_DOUBLE, has a value that we can get from the "fmovecr" instruction. The value, anded with 0xff, gives the code to use in fmovecr to get the desired constant. *//* This code has been fixed for cross-compilation. */ static int inited_68881_table = 0;char *strings_68881[7] = { "0.0", "1.0", "10.0", "100.0", "10000.0", "1e8", "1e16" };int codes_68881[7] = { 0x0f, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37 };REAL_VALUE_TYPE values_68881[7];/* Set up values_68881 array by converting the decimal values strings_68881 to binary. */voidinit_68881_table (){ int i; REAL_VALUE_TYPE r; enum machine_mode mode; mode = DFmode; for (i = 0; i < 7; i++) { if (i == 6) mode = SFmode; r = REAL_VALUE_ATOF (strings_68881[i], mode); values_68881[i] = r; } inited_68881_table = 1;}intstandard_68881_constant_p (x) rtx x;{ REAL_VALUE_TYPE r; int i; enum machine_mode mode;#ifdef NO_ASM_FMOVECR return 0;#endif /* fmovecr must be emulated on the 68040, so it shouldn't be used at all. */ if (TARGET_68040) return 0;#ifndef REAL_ARITHMETIC#if HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT if (! flag_pretend_float) return 0;#endif#endif if (! inited_68881_table) init_68881_table (); REAL_VALUE_FROM_CONST_DOUBLE (r, x); for (i = 0; i < 6; i++) { if (REAL_VALUES_EQUAL (r, values_68881[i])) return (codes_68881[i]); } if (GET_MODE (x) == SFmode) return 0; if (REAL_VALUES_EQUAL (r, values_68881[6])) return (codes_68881[6]); /* larger powers of ten in the constants ram are not used because they are not equal to a `double' C constant. */ return 0;}/* If X is a floating-point constant, return the logarithm of X base 2, or 0 if X is not a power of 2. */intfloating_exact_log2 (x) rtx x;{ REAL_VALUE_TYPE r, r1; int i;#ifndef REAL_ARITHMETIC#if HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT if (! flag_pretend_float) return 0;#endif#endif REAL_VALUE_FROM_CONST_DOUBLE (r, x); if (REAL_VALUES_LESS (r, dconst0)) return 0; r1 = dconst1; i = 0; while (REAL_VALUES_LESS (r1, r)) { r1 = REAL_VALUE_LDEXP (dconst1, i); if (REAL_VALUES_EQUAL (r1, r)) return i; i = i + 1; } return 0;}#ifdef SUPPORT_SUN_FPA/* Return nonzero if X, a CONST_DOUBLE, has a value that we can get from the Sun FPA's constant RAM. The value returned, anded with 0x1ff, gives the code to use in fpmove to get the desired constant. */static int inited_FPA_table = 0;char *strings_FPA[38] = {/* small rationals */ "0.0", "1.0", "0.5", "-1.0", "2.0", "3.0", "4.0", "8.0", "0.25", "0.125", "10.0", "-0.5",/* Decimal equivalents of double precision values */ "2.718281828459045091", /* D_E */ "6.283185307179586477", /* 2 pi */ "3.141592653589793116", /* D_PI */ "1.570796326794896619", /* pi/2 */ "1.414213562373095145", /* D_SQRT2 */ "0.7071067811865475244", /* 1/sqrt(2) */ "-1.570796326794896619", /* -pi/2 */ "1.442695040888963387", /* D_LOG2ofE */ "3.321928024887362182", /* D_LOG2of10 */ "0.6931471805599452862", /* D_LOGEof2 */ "2.302585092994045901", /* D_LOGEof10 */ "0.3010299956639811980", /* D_LOG10of2 */ "0.4342944819032518167", /* D_LOG10ofE *//* Decimal equivalents of single precision values */ "2.718281745910644531", /* S_E */ "6.283185307179586477", /* 2 pi */ "3.141592741012573242", /* S_PI */ "1.570796326794896619", /* pi/2 */ "1.414213538169860840", /* S_SQRT2 */ "0.7071067811865475244", /* 1/sqrt(2) */ "-1.570796326794896619", /* -pi/2 */ "1.442695021629333496", /* S_LOG2ofE */ "3.321928024291992188", /* S_LOG2of10 */ "0.6931471824645996094", /* S_LOGEof2 */ "2.302585124969482442", /* S_LOGEof10 */ "0.3010300099849700928", /* S_LOG10of2 */ "0.4342944920063018799", /* S_LOG10ofE */};int codes_FPA[38] = {/* small rationals */ 0x200, 0xe, 0xf, 0x10, 0x11, 0xb1, 0x12, 0x13, 0x15, 0x16, 0x17, 0x2e,/* double precision */ 0x8, 0x9, 0xa, 0xb, 0xc, 0xd, 0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,/* single precision */ 0x8, 0x9, 0xa, 0xb, 0xc, 0xd, 0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d };REAL_VALUE_TYPE values_FPA[38];/* This code has been fixed for cross-compilation. */voidinit_FPA_table (){ enum machine_mode mode; int i; REAL_VALUE_TYPE r; mode = DFmode; for (i = 0; i < 38; i++) { if (i == 25) mode = SFmode; r = REAL_VALUE_ATOF (strings_FPA[i], mode); values_FPA[i] = r; } inited_FPA_table = 1;}intstandard_sun_fpa_constant_p (x) rtx x;{ REAL_VALUE_TYPE r; int i;#ifndef REAL_ARITHMETIC#if HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT if (! flag_pretend_float) return 0;#endif
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