lib1funcs.asm

gcc库的原代码,对编程有很大帮助.

	.align	2
___lshrsi3:
	mov	#31,r0
	cmp/hi	r0,r5
	bt	L_lshrsi3_32
	mova	L_lshrsi3_table,r0
	mov.b	@(r0,r5),r5
	add	r5,r0		! Change to braf when gas is fixed
	jmp	@r0
	mov	r4,r0

L_lshrsi3_table:
	.byte		L_lshrsi3_0-L_lshrsi3_table
	.byte		L_lshrsi3_1-L_lshrsi3_table
	.byte		L_lshrsi3_2-L_lshrsi3_table
	.byte		L_lshrsi3_3-L_lshrsi3_table
	.byte		L_lshrsi3_4-L_lshrsi3_table
	.byte		L_lshrsi3_5-L_lshrsi3_table
	.byte		L_lshrsi3_6-L_lshrsi3_table
	.byte		L_lshrsi3_7-L_lshrsi3_table
	.byte		L_lshrsi3_8-L_lshrsi3_table
	.byte		L_lshrsi3_9-L_lshrsi3_table
	.byte		L_lshrsi3_10-L_lshrsi3_table
	.byte		L_lshrsi3_11-L_lshrsi3_table
	.byte		L_lshrsi3_12-L_lshrsi3_table
	.byte		L_lshrsi3_13-L_lshrsi3_table
	.byte		L_lshrsi3_14-L_lshrsi3_table
	.byte		L_lshrsi3_15-L_lshrsi3_table
	.byte		L_lshrsi3_16-L_lshrsi3_table
	.byte		L_lshrsi3_17-L_lshrsi3_table
	.byte		L_lshrsi3_18-L_lshrsi3_table
	.byte		L_lshrsi3_19-L_lshrsi3_table
	.byte		L_lshrsi3_20-L_lshrsi3_table
	.byte		L_lshrsi3_21-L_lshrsi3_table
	.byte		L_lshrsi3_22-L_lshrsi3_table
	.byte		L_lshrsi3_23-L_lshrsi3_table
	.byte		L_lshrsi3_24-L_lshrsi3_table
	.byte		L_lshrsi3_25-L_lshrsi3_table
	.byte		L_lshrsi3_26-L_lshrsi3_table
	.byte		L_lshrsi3_27-L_lshrsi3_table
	.byte		L_lshrsi3_28-L_lshrsi3_table
	.byte		L_lshrsi3_29-L_lshrsi3_table
	.byte		L_lshrsi3_30-L_lshrsi3_table
	.byte		L_lshrsi3_31-L_lshrsi3_table

L_lshrsi3_6:
	shlr2	r0
L_lshrsi3_4:
	shlr2	r0
L_lshrsi3_2:
	rts
	shlr2	r0

L_lshrsi3_7:
	shlr2	r0
L_lshrsi3_5:
	shlr2	r0
L_lshrsi3_3:
	shlr2	r0
L_lshrsi3_1:
	rts
	shlr	r0

L_lshrsi3_14:
	shlr2	r0
L_lshrsi3_12:
	shlr2	r0
L_lshrsi3_10:
	shlr2	r0
L_lshrsi3_8:
	rts
	shlr8	r0

L_lshrsi3_15:
	shlr2	r0
L_lshrsi3_13:
	shlr2	r0
L_lshrsi3_11:
	shlr2	r0
L_lshrsi3_9:
	shlr8	r0
	rts
	shlr	r0

L_lshrsi3_22:
	shlr2	r0
L_lshrsi3_20:
	shlr2	r0
L_lshrsi3_18:
	shlr2	r0
L_lshrsi3_16:
	rts
	shlr16	r0

L_lshrsi3_23:
	shlr2	r0
L_lshrsi3_21:
	shlr2	r0
L_lshrsi3_19:
	shlr2	r0
L_lshrsi3_17:
	shlr16	r0
	rts
	shlr	r0

L_lshrsi3_30:
	shlr2	r0
L_lshrsi3_28:
	shlr2	r0
L_lshrsi3_26:
	shlr2	r0
L_lshrsi3_24:
	shlr16	r0
	rts
	shlr8	r0

L_lshrsi3_31:
	shlr2	r0
L_lshrsi3_29:
	shlr2	r0
L_lshrsi3_27:
	shlr2	r0
L_lshrsi3_25:
	shlr16	r0
	shlr8	r0
	rts
	shlr	r0

L_lshrsi3_32:
	rts
	mov	#0,r0

L_lshrsi3_0:
	rts
	nop

#endif

#ifdef L_movstr
	.text
! done all the large groups, do the remainder

! jump to movstr+
done:
	add	#64,r5
	mova	___movstrSI0,r0
	shll2	r6
	add	r6,r0
	jmp	@r0
	add	#64,r4
	.align	4
	.global	___movstrSI64
___movstrSI64:
	mov.l	@(60,r5),r0
	mov.l	r0,@(60,r4)
	.global	___movstrSI60
___movstrSI60:
	mov.l	@(56,r5),r0
	mov.l	r0,@(56,r4)
	.global	___movstrSI56
___movstrSI56:
	mov.l	@(52,r5),r0
	mov.l	r0,@(52,r4)
	.global	___movstrSI52
___movstrSI52:
	mov.l	@(48,r5),r0
	mov.l	r0,@(48,r4)
	.global	___movstrSI48
___movstrSI48:
	mov.l	@(44,r5),r0
	mov.l	r0,@(44,r4)
	.global	___movstrSI44
___movstrSI44:
	mov.l	@(40,r5),r0
	mov.l	r0,@(40,r4)
	.global	___movstrSI40
___movstrSI40:
	mov.l	@(36,r5),r0
	mov.l	r0,@(36,r4)
	.global	___movstrSI36
___movstrSI36:
	mov.l	@(32,r5),r0
	mov.l	r0,@(32,r4)
	.global	___movstrSI32
___movstrSI32:
	mov.l	@(28,r5),r0
	mov.l	r0,@(28,r4)
	.global	___movstrSI28
___movstrSI28:
	mov.l	@(24,r5),r0
	mov.l	r0,@(24,r4)
	.global	___movstrSI24
___movstrSI24:
	mov.l	@(20,r5),r0
	mov.l	r0,@(20,r4)
	.global	___movstrSI20
___movstrSI20:
	mov.l	@(16,r5),r0
	mov.l	r0,@(16,r4)
	.global	___movstrSI16
___movstrSI16:
	mov.l	@(12,r5),r0
	mov.l	r0,@(12,r4)
	.global	___movstrSI12
___movstrSI12:
	mov.l	@(8,r5),r0
	mov.l	r0,@(8,r4)
	.global	___movstrSI8
___movstrSI8:
	mov.l	@(4,r5),r0
	mov.l	r0,@(4,r4)
	.global	___movstrSI4
___movstrSI4:
	mov.l	@(0,r5),r0
	mov.l	r0,@(0,r4)
___movstrSI0:
	rts
	or	r0,r0,r0

	.align	4

	.global	___movstr
___movstr:
	mov.l	@(60,r5),r0
	mov.l	r0,@(60,r4)

	mov.l	@(56,r5),r0
	mov.l	r0,@(56,r4)

	mov.l	@(52,r5),r0
	mov.l	r0,@(52,r4)

	mov.l	@(48,r5),r0
	mov.l	r0,@(48,r4)

	mov.l	@(44,r5),r0
	mov.l	r0,@(44,r4)

	mov.l	@(40,r5),r0
	mov.l	r0,@(40,r4)

	mov.l	@(36,r5),r0
	mov.l	r0,@(36,r4)

	mov.l	@(32,r5),r0
	mov.l	r0,@(32,r4)

	mov.l	@(28,r5),r0
	mov.l	r0,@(28,r4)

	mov.l	@(24,r5),r0
	mov.l	r0,@(24,r4)

	mov.l	@(20,r5),r0
	mov.l	r0,@(20,r4)

	mov.l	@(16,r5),r0
	mov.l	r0,@(16,r4)

	mov.l	@(12,r5),r0
	mov.l	r0,@(12,r4)

	mov.l	@(8,r5),r0
	mov.l	r0,@(8,r4)

	mov.l	@(4,r5),r0
	mov.l	r0,@(4,r4)

	mov.l	@(0,r5),r0
	mov.l	r0,@(0,r4)

	add	#-16,r6
	cmp/pl	r6
	bf	done

	add	#64,r5
	bra	___movstr
	add	#64,r4
#endif

#ifdef L_mulsi3


	.global	___mulsi3

! r4 =       aabb
! r5 =       ccdd
! r0 = aabb*ccdd  via partial products
!
! if aa == 0 and cc = 0
! r0 = bb*dd
!
! else
! aa = bb*dd + (aa*dd*65536) + (cc*bb*65536)
!

___mulsi3:
	mulu    r4,r5		! multiply the lsws  macl=bb*dd
	mov     r5,r3		! r3 = ccdd
	swap.w  r4,r2		! r2 = bbaa
	xtrct   r2,r3		! r3 = aacc
	tst  	r3,r3		! msws zero ?
	bf      hiset
	rts			! yes - then we have the answer
	sts     macl,r0

hiset:	sts	macl,r0		! r0 = bb*dd
	mulu	r2,r5		| brewing macl = aa*dd
	sts	macl,r1
	mulu	r3,r4		| brewing macl = cc*bb
	sts	macl,r2
	add	r1,r2
	shll16	r2
	rts
	add	r2,r0


#endif
#ifdef L_sdivsi3
	.title "SH DIVIDE"
!! 4 byte integer Divide code for the Hitachi SH
!!
!! Steve Chamberlain
!! [e-mail]
!!
!!

!! args in r4 and r5, result in r0 clobber r1,r2,r3

	.global	___sdivsi3
___sdivsi3:
	mov	r4,r1
	mov	r5,r0

	tst	r0,r0
	bt	div0
	mov	#0,r2
	div0s	r2,r1
	subc	r3,r3
	subc	r2,r1
	div0s	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	div1	r0,r3
	rotcl	r1
	addc	r2,r1
	rts
	mov	r1,r0


div0:	rts
	mov	#0,r0

#endif
#ifdef L_udivsi3

	.title "SH DIVIDE"
!! 4 byte integer Divide code for the Hitachi SH
!!
!! Steve Chamberlain
!! [e-mail]
!!
!!

!! args in r4 and r5, result in r0, clobbers r4, pr, and t bit
	.global	___udivsi3

___udivsi3:
longway:
	mov	#0,r0
	div0u
	! get one bit from the msb of the numerator into the T
	! bit and divide it by whats in r5.  Put the answer bit
	! into the T bit so it can come out again at the bottom

	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0

	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
shortway:
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0

vshortway:
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4 ; div1 r5,r0
	rotcl	r4
ret:	rts
	mov	r4,r0

#endif