📄 netstart.mac
字号:
/*************************************************************************/
/* */
/* FILE NAME VERSION */
/* */
/* snds.a SNDS100 Board version 1.0 */
/* */
/* COMPONENT */
/* */
/* DESCRIPTION */
/* */
/* SNDS100 for KS32C5000, KS32C50100 ASSEBLER SYSTEM HEADER FILE */
/* */
/* AUTHOR */
/* */
/* */
/* DATA STRUCTURES */
/* */
/* */
/* FUNCTIONS */
/* */
/* DEPENDENCIES */
/* */
/* */
/*************************************************************************/
/*************************************************************************/
/* Format of the Program Status Register */
/*************************************************************************/
/* */
/* 31 30 29 28 7 6 5 4 3 2 1 0 */
/*+---+---+---+---+--ss--+---+---+---+---+---+---+---+---+ */
/*| N | Z | C | V | | I | F | T | M4 ~ M0 | */
/*+---+---+---+---+--ss--+---+---+---+---+---+---+---+---+ */
/* */
/* Processor Mode and Mask */
/* */
/*************************************************************************/
.EQU FBit, 0x40
.EQU IBit, 0x80
.EQU LOCKOUT, 0xC0 /* Interrupt lockout value */
.EQU LOCK_MSK, 0xC0 /* Interrupt lockout mask value */
.EQU MODE_MASK, 0x1F /* Processor Mode Mask */
.EQU SYS_MODE, 0x1F /* System Mode(SYS) */
.EQU UDF_MODE, 0x1B /* Undefine Mode(UDF) */
.EQU ABT_MODE, 0x17 /* Abort Mode(ABT) */
.EQU SUP_MODE, 0x13 /* Supervisor Mode (SVC) */
.EQU IRQ_MODE, 0x12 /* Interrupt Mode (IRQ) */
.EQU FIQ_MODE, 0x11 /* Fast Interrupt Mode (FIQ) */
.EQU USR_MODE, 0x10 /* User Mode(USR) */
/****************************************************************************/
/* SYSTEM STACK MEMORY : 8K bytes system stacks are defined at memory.a */
/****************************************************************************/
.EQU USR_STACK_SIZE, 1024
.EQU UDF_STACK_SIZE, 512
.EQU ABT_STACK_SIZE, 512
.EQU IRQ_STACK_SIZE, 2048
.EQU FIQ_STACK_SIZE, 2048
.EQU SUP_STACK_SIZE, 2048
/************************************/
/* SYSTEM USER STACK MEMORY */
/************************************/
.EQU SYSTEM_SIZE, 1024 /* Define the system stack size */
.EQU TIMER_SIZE, 1024 /* Define timer HISR stack size */
.EQU TIMER_PRIORITY, 2 /* Timer HISR priority (values from
/* 0 to 2, where 0 is highest)
/************************************/
/* SYSTEM CLOCK */
/************************************/
.EQU MHz, 1000000
.EQU fMCLK_MHz, 50000000 /* 50MHz, KS32C50100 */
#.EQU fMCLK_MHz, 20000000 /* 33MHz, KS32C5000 */
#.EQU fMCLK_MHz, 25000000 /* 33MHz, KS32C5000 */
#.EQU fMCLK_MHz, 30000000 /* 33MHz, KS32C5000 */
#.EQU fMCLK_MHz, 33000000 /* 33MHz, KS32C5000 */
#.EQU fMCLK_MHz, 40000000 /* 33MHz, KS32C5000 */
.EQU fMCLK, fMCLK_MHz/MHz
/****************************************************/
/* SYSTEM MEMORY CONTROL REGISTER EQU TABLES */
/****************************************************/
/* -> EXTDBWTH : Memory Bus Width register */
/*------------------------------------------------------------------*/
.EQU DSR0, (2<<0) /* ROM0, 0 : Disable */
/* 1 : Byte */
/* 2 : Half-Word */
/* 3 : Word */
.EQU DSR1, (2<<2) /* ROM1 */
.EQU DSR2, (3<<4) /* ROM2 */
.EQU DSR3, (3<<6) /* ROM3 */
.EQU DSR4, (3<<8) /* ROM4 */
.EQU DSR5, (3<<10) /* ROM5 */
.EQU DSD0, (3<<12) /* DRAM0 */
.EQU DSD1, (3<<14) /* DRAM1 */
.EQU DSD2, (3<<16) /* DRAM2 */
.EQU DSD3, (3<<18) /* DRAM3 */
.EQU DSX0, (3<<20) /* EXTIO0 */
.EQU DSX1, (3<<22) /* EXTIO1 */
.EQU DSX2, (3<<24) /* EXTIO2 */
.EQU DSX3, (3<<26) /* EXTIO3 */
.EQU rEXTDBWTH, DSR0+DSR1+DSR2+DSR3+DSR4+DSR5+DSD0+DSD1+DSD2+DSD3+DSX0+DSX1+DSX2+DSX3
/*------------------------------------------------------------------*/
/* -> ROMCON0 : ROM Bank0 Control register */
/*------------------------------------------------------------------*/
.EQU ROMBasePtr0, (0x000<<10) /* =0x0000000 */
.EQU ROMEndPtr0, (0x020<<20) /* =0x0200000 */
.EQU ROMBasePtr0_S, (0x100<<10) /* =0x1000000 REMAP */
.EQU ROMEndPtr0_S, (0x120<<20) /* =0x1200000 */
.EQU PMC0, 0x0 /* 0x0=Normal ROM, 0x1=4Word Page */
/* 0x2=8Word Page, 0x3=16Word Page */
.EQU rTpa0, (0x0<<2) /* 0x0=5Cycle, 0x1=2Cycle */
/* 0x2=3Cycle, 0x3=4Cycle */
.EQU rTacc0, (0x6<<4) /* 0x0=Disable, 0x1=2Cycle */
/* 0x2=3Cycle, 0x3=4Cycle */
/* 0x4=5Cycle, 0x5=6Cycle */
/* 0x6=7Cycle, 0x7=Reserved */
.EQU rROMCON0, ROMEndPtr0+ROMBasePtr0+rTacc0+rTpa0+PMC0
.EQU rROMCON0_S, ROMEndPtr0_S+ROMBasePtr0_S+rTacc0+rTpa0+PMC0
/*------------------------------------------------------------------*/
/* -> ROMCON1 : ROM Bank1 Control register */
/*------------------------------------------------------------------*/
.EQU ROMBasePtr1, (0x020<<10) /* =0x0200000 */
.EQU ROMEndPtr1, (0x040<<20) /* =0x0400000 */
.EQU ROMBasePtr1_S, (0x120<<10) /* =0x1200000 */
.EQU ROMEndPtr1_S, (0x140<<20) /* =0x1400000 */
.EQU PMC1, 0x0 /* 0x0=Normal ROM, 0x1=4Word Page */
/* 0x2=8Word Page, 0x3=16Word Page */
.EQU rTpa1, (0x0<<2) /* 0x0=5Cycle, 0x1=2Cycle */
/* 0x2=3Cycle, 0x3=4Cycle */
.EQU rTacc1, (0x4<<4) /* 0x0=Disable, 0x1=2Cycle */
/* 0x2=3Cycle, 0x3=4Cycle */
/* 0x4=5Cycle, 0x5=6Cycle */
/* 0x6=7Cycle, 0x7=Reserved */
.EQU rROMCON1, ROMEndPtr1+ROMBasePtr1+rTacc1+rTpa1+PMC1
.EQU rROMCON1_S, ROMEndPtr1_S+ROMBasePtr1_S+rTacc1+rTpa1+PMC1
/*------------------------------------------------------------------*/
/* -> ROMCON2 : ROM Bank2 Control register */
/*------------------------------------------------------------------*/
.EQU ROMBasePtr2, (0x040<<10) /* =0x0400000 */
.EQU ROMEndPtr2, (0x060<<20) /* =0x0600000 */
.EQU ROMBasePtr2_S, (0x140<<10) /* =0x1400000 */
.EQU ROMEndPtr2_S, (0x160<<20) /* =0x1600000 */
.EQU PMC2, 0x0 /* 0x0=Normal ROM, 0x1=4Word Page */
/* 0x2=8Word Page, 0x3=16Word Page */
.EQU rTpa2, (0x0<<2) /* 0x0=5Cycle, 0x1=2Cycle */
/* 0x2=3Cycle, 0x3=4Cycle */
.EQU rTacc2, (0x4<<4) /* 0x0=Disable, 0x1=2Cycle */
/* 0x2=3Cycle, 0x3=4Cycle */
/* 0x4=5Cycle, 0x5=6Cycle */
/* 0x6=7Cycle, 0x7=Reserved */
.EQU rROMCON2, ROMEndPtr2+ROMBasePtr2+rTacc2+rTpa2+PMC2
.EQU rROMCON2_S, ROMEndPtr2_S+ROMBasePtr2_S+rTacc2+rTpa2+PMC2
/*------------------------------------------------------------------*/
/* -> ROMCON3 : ROM Bank3 Control register */
/*------------------------------------------------------------------*/
.EQU ROMBasePtr3, (0x060<<10) /* =0x0600000 */
.EQU ROMEndPtr3, (0x080<<20) /* =0x0800000 */
.EQU ROMBasePtr3_S, (0x060<<10) /* =0x1600000 */
.EQU ROMEndPtr3_S, (0x080<<20) /* =0x1800000 */
.EQU PMC3, 0x0 /* 0x0=Normal ROM, 0x1=4Word Page */
/* 0x2=8Word Page, 0x3=16Word Page */
.EQU rTpa3, (0x0<<2) /* 0x0=5Cycle, 0x1=2Cycle */
/* 0x2=3Cycle, 0x3=4Cycle */
.EQU rTacc3, (0x2<<4) /* 0x0=Disable, 0x1=2Cycle */
/* 0x2=3Cycle, 0x3=4Cycle */
/* 0x4=5Cycle, 0x5=6Cycle */
/* 0x6=7Cycle, 0x7=Reserved */
.EQU rROMCON3, ROMEndPtr3+ROMBasePtr3+rTacc3+rTpa3+PMC3
.EQU rROMCON3_S, ROMEndPtr3_S+ROMBasePtr3_S+rTacc3+rTpa3+PMC3
/*------------------------------------------------------------------*/
/* -> ROMCON4 : ROM Bank4 Control register */
/*------------------------------------------------------------------*/
.EQU ROMBasePtr4, (0x080<<10) /* =0x0800000 */
.EQU ROMEndPtr4, (0x0A0<<20) /* =0x0A00000 */
.EQU ROMBasePtr4_S, (0x180<<10) /* =0x1800000 */
.EQU ROMEndPtr4_S, (0x1A0<<20) /* =0x1A00000 */
.EQU PMC4, 0x0 /* 0x0=Normal ROM, 0x1=4Word Page */
/* 0x2=8Word Page, 0x3=16Word Page */
.EQU rTpa4, (0x0<<2) /* 0x0=5Cycle, 0x1=2Cycle */
/* 0x2=3Cycle, 0x3=4Cycle */
.EQU rTacc4, (0x4<<4) /* 0x0=Disable, 0x1=2Cycle */
/* 0x2=3Cycle, 0x3=4Cycle */
/* 0x4=5Cycle, 0x5=6Cycle */
/* 0x6=7Cycle, 0x7=Reserved */
.EQU rROMCON4, ROMEndPtr4+ROMBasePtr4+rTacc4+rTpa4+PMC4
.EQU rROMCON4_S, ROMEndPtr4_S+ROMBasePtr4_S+rTacc4+rTpa4+PMC4
/*------------------------------------------------------------------*/
/* -> ROMCON5 : ROM Bank5 Control register */
/*------------------------------------------------------------------*/
.EQU ROMBasePtr5, (0x0A0<<10) /* =0x0A00000 */
.EQU ROMEndPtr5, (0x0C0<<20) /* =0x0C00000 */
.EQU ROMBasePtr5_S, (0x1A0<<10) /* =0x1A00000 */
.EQU ROMEndPtr5_S, (0x1C0<<20) /* =0x1C00000 */
.EQU PMC5, 0x0 /* 0x0=Normal ROM, 0x1=4Word Page */
/* 0x2=8Word Page, 0x3=16Word Page */
.EQU rTpa5, (0x0<<2) /* 0x0=5Cycle, 0x1=2Cycle */
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -