isr.c

~{WwU_J9SC5D~}ucos~{T4Bk#,1`RkA4=S5wJT>y?IRT#,4x~}uart~{2bJT~}

#include "isr.h"
#include "segment7.h"


#ifdef CBUILDER_TEST
char ArrayAddr[200000];
#endif

static void (*InterruptHandlers[MAXHNDLRS])(void);


/*
* Defualt ISR
*/
void DummyIsr(void)
{
}


/*
* InitIntHandlerTable: Initialize the interrupt handler table
* NOTE(S): This should be called during system initialization
*/
void InitIntHandlerTable(void)
{
	U32 i;

	for(i = 0; i < MAXHNDLRS; i++)
	{
    	InterruptHandlers[i] = DummyIsr;
	}
}


/*
* SysSetInterrupt: Setup Interrupt Handler Vector Table
*/
void SysSetInterrupt(REG32 vector, void (*handler)(void))
{
	if(vector < MAXHNDLRS)
		InterruptHandlers[vector] = handler;
}


void ISR_UndefHandler(REG32 *adr)
{
	U32 i = 0;

	while(1)
	{
		Set7Segment(0x0e);
		for(i=0; i<1000000UL; i++);
		Set7Segment(1);	
		for(i=0; i<100000UL; i++);
	}
}


void ISR_PrefetchHandler(REG32 *adr)
{
	U32 i = 0;

	while(1)
	{
		Set7Segment(0x0e);
		for(i=0; i<1000000UL; i++);
		Set7Segment(1);	
		for(i=0; i<100000UL; i++);
	}
}


void ISR_AbortHandler(REG32 *adr)
{
	U32 i = 0;

	while(1)
	{
		Set7Segment(0x0e);
		for(i=0; i<1000000UL; i++);
		Set7Segment(1);	
		for(i=0; i<100000UL; i++);
	}
}


void ISR_SwiHandler(void)
{
}


void ISR_IrqHandler(void)
{
	U32 IntOffSet;

	OSIntEnter();
	IntOffSet = (U32)INTOFFSET;
	Clear_PendingBit(IntOffSet>>2);
	(*InterruptHandlers[IntOffSet>>2])();	/* Call interrupt service routine */
	OSIntExit();
}


void ISR_FiqHandler(void)
{
	U32 IntOffSet;

	OSIntEnter();
	IntOffSet = (U32)INTOFFSET;
	Clear_PendingBit(IntOffSet>>2);
	(*InterruptHandlers[IntOffSet>>2])();	/* Call interrupt service routine */
	OSIntExit();
}


void ClrIntStatus(void)
{
	INTMASK = 0x3fffff;  /* All interrupt disabled include global bit */
	INTPEND = 0x1fffff;  /* All clear pending */
	INTMODE = 0x000000;  /* ALL IRQ mode */
}


/*
* InitInterrupt: Initialize Interrupt
*/
void InitInterrupt(void)
{
	ClrIntStatus();				/* Clear All interrupt */
	InitIntHandlerTable() ;
}