time_sim.v

Verilog源码15.rar

    (\add_24/u6/S0_1/CY4_1/CY4/MUXB_OUT ));
    X_AND2 \add_24/u6/S0_1/CY4_1/CY4/CIN_AND_102  (.IN0 (\add_24/u6/S0_1/CO_2 )
    , .IN1 (\add_24/u6/S0_1/CY4_1/CY4/MUXB_OUT ), .OUT 
    (\add_24/u6/S0_1/CY4_1/CY4/CIN_AND ));
    X_AND2 \add_24/u6/S0_1/CY4_1/CY4/MUXC_AND_103  (.IN0 
    (\add_24/u6/S0_1/CY4_1/CY4/MUXC_OUT ), .IN1 
    (\add_24/u6/S0_1/CY4_1/CY4/MUXC_AND_1_INV ), .OUT 
    (\add_24/u6/S0_1/CY4_1/CY4/MUXC_AND ));
    X_OR2 \add_24/u6/S0_1/CY4_1/CY4/COUT0  (.IN0 
    (\add_24/u6/S0_1/CY4_1/CY4/CIN_AND ), .IN1 
    (\add_24/u6/S0_1/CY4_1/CY4/MUXC_AND ), .OUT (\add_24/u6/S0_1/CO_3 ));
    X_AND2 \add_24/u6/S0_1/CY4_1/CY4/G1_AND_105  (.IN0 (VCC), .IN1 
    (\add_24/u6/S0_1/CY4_1/C7 ), .OUT (\add_24/u6/S0_1/CY4_1/CY4/G1_AND ));
    X_XOR2 \add_24/u6/S0_1/CY4_1/CY4/G1_XOR_106  (.IN0 
    (\add_24/u6/S0_1/CY4_1/CY4/G1_AND ), .IN1 
    (\add_24/u6/S0_1/CY4_1/CY4/MUXA_OUT ), .OUT 
    (\add_24/u6/S0_1/CY4_1/CY4/G1_XOR ));
    X_XOR2 \add_24/u6/S0_1/CY4_1/CY4/G4_XOR_107  (.IN0 
    (\add_24/u6/S0_1/CY4_1/CY4/G1_XOR ), .IN1 (n165), .OUT 
    (\add_24/u6/S0_1/CY4_1/CY4/G4_XOR ));
    X_AND2 \add_24/u6/S0_1/CY4_1/CY4/C6_AND_108  (.IN0 
    (\add_24/u6/S0_1/CY4_1/C6 ), .IN1 (\add_24/u6/S0_1/CY4_1/CY4/G4_XOR ), .OUT 
    (\add_24/u6/S0_1/CY4_1/CY4/C6_AND ));
    X_OR2 \add_24/u6/S0_1/CY4_1/CY4/C6_OR_109  (.IN0 
    (\add_24/u6/S0_1/CY4_1/CY4/C6_OR_0_INV ), .IN1 
    (\add_24/u6/S0_1/CY4_1/CY4/C6_AND ), .OUT (\add_24/u6/S0_1/CY4_1/CY4/C6_OR )
    );
    X_AND2 \add_24/u6/S0_1/CY4_1/CY4/COUT0_AND_110  (.IN0 
    (\add_24/u6/S0_1/CO_3 ), .IN1 (\add_24/u6/S0_1/CY4_1/CY4/C6_OR ), .OUT 
    (\add_24/u6/S0_1/CY4_1/CY4/COUT0_AND ));
    X_AND2 \add_24/u6/S0_1/CY4_1/CY4/G4_AND_111  (.IN0 (n165), .IN1 
    (\add_24/u6/S0_1/CY4_1/CY4/G4_AND_1_INV ), .OUT 
    (\add_24/u6/S0_1/CY4_1/CY4/G4_AND ));
    X_OR2 \add_24/u6/S0_1/CY4_1/CY4/COUT  (.IN0 
    (\add_24/u6/S0_1/CY4_1/CY4/COUT0_AND ), .IN1 
    (\add_24/u6/S0_1/CY4_1/CY4/G4_AND ), .OUT (\add_24/u6/S0_1/CO_4 ));
    X_BUF \add_24/u6/S0_1/CY4_1/CY4_32/C0BUF  (.IN 
    (\add_24/u6/S0_1/CY4_1/CY4_32/ONE ), .OUT (\add_24/u6/S0_1/CY4_1/C0 ));
    X_BUF \add_24/u6/S0_1/CY4_1/CY4_32/C1BUF  (.IN 
    (\add_24/u6/S0_1/CY4_1/CY4_32/ZERO ), .OUT (\add_24/u6/S0_1/CY4_1/C1 ));
    X_BUF \add_24/u6/S0_1/CY4_1/CY4_32/C2BUF  (.IN 
    (\add_24/u6/S0_1/CY4_1/CY4_32/ZERO ), .OUT (\add_24/u6/S0_1/CY4_1/C2 ));
    X_BUF \add_24/u6/S0_1/CY4_1/CY4_32/C3BUF  (.IN 
    (\add_24/u6/S0_1/CY4_1/CY4_32/ONE ), .OUT (\add_24/u6/S0_1/CY4_1/C3 ));
    X_BUF \add_24/u6/S0_1/CY4_1/CY4_32/C4BUF  (.IN 
    (\add_24/u6/S0_1/CY4_1/CY4_32/ONE ), .OUT (\add_24/u6/S0_1/CY4_1/C4 ));
    X_BUF \add_24/u6/S0_1/CY4_1/CY4_32/C5BUF  (.IN 
    (\add_24/u6/S0_1/CY4_1/CY4_32/ONE ), .OUT (\add_24/u6/S0_1/CY4_1/C5 ));
    X_BUF \add_24/u6/S0_1/CY4_1/CY4_32/C6BUF  (.IN 
    (\add_24/u6/S0_1/CY4_1/CY4_32/ONE ), .OUT (\add_24/u6/S0_1/CY4_1/C6 ));
    X_BUF \add_24/u6/S0_1/CY4_1/CY4_32/C7BUF  (.IN 
    (\add_24/u6/S0_1/CY4_1/CY4_32/ZERO ), .OUT (\add_24/u6/S0_1/CY4_1/C7 ));
    X_ZERO \add_24/u6/S0_1/CY4_1/CY4_32/X_ZERO  (.OUT 
    (\add_24/u6/S0_1/CY4_1/CY4_32/ZERO ));
    X_ONE \add_24/u6/S0_1/CY4_1/CY4_32/X_ONE  (.OUT 
    (\add_24/u6/S0_1/CY4_1/CY4_32/ONE ));
    X_AND3 \add_24/u6/S0_1/CY4_0/CY4/AND3_A_125  (.IN0 
    (\add_24/u6/S0_1/CY4_0/C7 ), .IN1 (\add_24/u6/S0_1/CY4_0/CY4/AND3_A_1_INV )
    , .IN2 (\add_24/u6/S0_1/CY4_0/CY4/AND3_A_2_INV ), .OUT 
    (\add_24/u6/S0_1/CY4_0/CY4/AND3_A ));
    X_AND3 \add_24/u6/S0_1/CY4_0/CY4/AND3_B_126  (.IN0 
    (\add_24/u6/S0_1/CY4_0/CY4/AND3_B_0_INV ), .IN1 (\add_24/u6/S0_1/CY4_0/C5 )
    , .IN2 (\add_24/u6/S0_1/CY4_0/CY4/AND3_B_2_INV ), .OUT 
    (\add_24/u6/S0_1/CY4_0/CY4/AND3_B ));
    X_AND3 \add_24/u6/S0_1/CY4_0/CY4/AND3_C_127  (.IN0 (n168), .IN1 
    (\add_24/u6/S0_1/CY4_0/C5 ), .IN2 (\add_24/u6/S0_1/CY4_0/C4 ), .OUT 
    (\add_24/u6/S0_1/CY4_0/CY4/AND3_C ));
    X_OR3 \add_24/u6/S0_1/CY4_0/CY4/MUXC_OUT_128  (.IN0 
    (\add_24/u6/S0_1/CY4_0/CY4/AND3_A ), .IN1 
    (\add_24/u6/S0_1/CY4_0/CY4/AND3_B ), .IN2 
    (\add_24/u6/S0_1/CY4_0/CY4/AND3_C ), .OUT 
    (\add_24/u6/S0_1/CY4_0/CY4/MUXC_OUT ));
    X_AND2 \add_24/u6/S0_1/CY4_0/CY4/C1_AND_129  (.IN0 
    (\add_24/u6/S0_1/CY4_0/C1 ), .IN1 (\add_24/u6/S0_1/CY4_0/CY4/C1_AND_1_INV )
    , .OUT (\add_24/u6/S0_1/CY4_0/CY4/C1_AND ));
    X_AND2 \add_24/u6/S0_1/CY4_0/CY4/C0_AND_130  (.IN0 
    (\add_24/u6/S0_1/CY4_0/C0 ), .IN1 (\add_24/n19 ), .OUT 
    (\add_24/u6/S0_1/CY4_0/CY4/C0_AND ));
    X_OR2 \add_24/u6/S0_1/CY4_0/CY4/MUXA_OUT_131  (.IN0 
    (\add_24/u6/S0_1/CY4_0/CY4/C0_AND ), .IN1 
    (\add_24/u6/S0_1/CY4_0/CY4/C1_AND ), .OUT 
    (\add_24/u6/S0_1/CY4_0/CY4/MUXA_OUT_2_INV ));
    X_AND2 \add_24/u6/S0_1/CY4_0/CY4/F2_AND_132  (.IN0 (VCC), .IN1 
    (\add_24/u6/S0_1/CY4_0/C7 ), .OUT (\add_24/u6/S0_1/CY4_0/CY4/F2_AND ));
    X_XOR2 \add_24/u6/S0_1/CY4_0/CY4/F2_XOR_133  (.IN0 
    (\add_24/u6/S0_1/CY4_0/CY4/F2_AND ), .IN1 
    (\add_24/u6/S0_1/CY4_0/CY4/MUXA_OUT ), .OUT 
    (\add_24/u6/S0_1/CY4_0/CY4/F2_XOR ));
    X_XOR2 \add_24/u6/S0_1/CY4_0/CY4/F1_XOR_134  (.IN0 
    (\add_24/u6/S0_1/CY4_0/CY4/F2_XOR ), .IN1 (n168), .OUT 
    (\add_24/u6/S0_1/CY4_0/CY4/F1_XOR ));
    X_AND2 \add_24/u6/S0_1/CY4_0/CY4/C2_AND_135  (.IN0 
    (\add_24/u6/S0_1/CY4_0/C2 ), .IN1 (\add_24/u6/S0_1/CY4_0/CY4/C2_AND_1_INV )
    , .OUT (\add_24/u6/S0_1/CY4_0/CY4/C2_AND ));
    X_AND2 \add_24/u6/S0_1/CY4_0/CY4/C3_AND_136  (.IN0 
    (\add_24/u6/S0_1/CY4_0/C3 ), .IN1 (\add_24/u6/S0_1/CY4_0/CY4/F1_XOR ), .OUT 
    (\add_24/u6/S0_1/CY4_0/CY4/C3_AND ));
    X_OR2 \add_24/u6/S0_1/CY4_0/CY4/MUXB_OUT_137  (.IN0 
    (\add_24/u6/S0_1/CY4_0/CY4/C2_AND ), .IN1 
    (\add_24/u6/S0_1/CY4_0/CY4/C3_AND ), .OUT 
    (\add_24/u6/S0_1/CY4_0/CY4/MUXB_OUT ));
    X_AND2 \add_24/u6/S0_1/CY4_0/CY4/CIN_AND_138  (.IN0 (VCC), .IN1 
    (\add_24/u6/S0_1/CY4_0/CY4/MUXB_OUT ), .OUT 
    (\add_24/u6/S0_1/CY4_0/CY4/CIN_AND ));
    X_AND2 \add_24/u6/S0_1/CY4_0/CY4/MUXC_AND_139  (.IN0 
    (\add_24/u6/S0_1/CY4_0/CY4/MUXC_OUT ), .IN1 
    (\add_24/u6/S0_1/CY4_0/CY4/MUXC_AND_1_INV ), .OUT 
    (\add_24/u6/S0_1/CY4_0/CY4/MUXC_AND ));
    X_OR2 \add_24/u6/S0_1/CY4_0/CY4/COUT0  (.IN0 
    (\add_24/u6/S0_1/CY4_0/CY4/CIN_AND ), .IN1 
    (\add_24/u6/S0_1/CY4_0/CY4/MUXC_AND ), .OUT (\add_24/u6/S0_1/CO_1 ));
    X_AND2 \add_24/u6/S0_1/CY4_0/CY4/G1_AND_141  (.IN0 (VCC), .IN1 
    (\add_24/u6/S0_1/CY4_0/C7 ), .OUT (\add_24/u6/S0_1/CY4_0/CY4/G1_AND ));
    X_XOR2 \add_24/u6/S0_1/CY4_0/CY4/G1_XOR_142  (.IN0 
    (\add_24/u6/S0_1/CY4_0/CY4/G1_AND ), .IN1 
    (\add_24/u6/S0_1/CY4_0/CY4/MUXA_OUT ), .OUT 
    (\add_24/u6/S0_1/CY4_0/CY4/G1_XOR ));
    X_XOR2 \add_24/u6/S0_1/CY4_0/CY4/G4_XOR_143  (.IN0 
    (\add_24/u6/S0_1/CY4_0/CY4/G1_XOR ), .IN1 (n167), .OUT 
    (\add_24/u6/S0_1/CY4_0/CY4/G4_XOR ));
    X_AND2 \add_24/u6/S0_1/CY4_0/CY4/C6_AND_144  (.IN0 
    (\add_24/u6/S0_1/CY4_0/C6 ), .IN1 (\add_24/u6/S0_1/CY4_0/CY4/G4_XOR ), .OUT 
    (\add_24/u6/S0_1/CY4_0/CY4/C6_AND ));
    X_OR2 \add_24/u6/S0_1/CY4_0/CY4/C6_OR_145  (.IN0 
    (\add_24/u6/S0_1/CY4_0/CY4/C6_OR_0_INV ), .IN1 
    (\add_24/u6/S0_1/CY4_0/CY4/C6_AND ), .OUT (\add_24/u6/S0_1/CY4_0/CY4/C6_OR )
    );
    X_AND2 \add_24/u6/S0_1/CY4_0/CY4/COUT0_AND_146  (.IN0 
    (\add_24/u6/S0_1/CO_1 ), .IN1 (\add_24/u6/S0_1/CY4_0/CY4/C6_OR ), .OUT 
    (\add_24/u6/S0_1/CY4_0/CY4/COUT0_AND ));
    X_AND2 \add_24/u6/S0_1/CY4_0/CY4/G4_AND_147  (.IN0 (n167), .IN1 
    (\add_24/u6/S0_1/CY4_0/CY4/G4_AND_1_INV ), .OUT 
    (\add_24/u6/S0_1/CY4_0/CY4/G4_AND ));
    X_OR2 \add_24/u6/S0_1/CY4_0/CY4/COUT  (.IN0 
    (\add_24/u6/S0_1/CY4_0/CY4/COUT0_AND ), .IN1 
    (\add_24/u6/S0_1/CY4_0/CY4/G4_AND ), .OUT (\add_24/u6/S0_1/CO_2 ));
    X_BUF \add_24/u6/S0_1/CY4_0/CY4_33/C0BUF  (.IN 
    (\add_24/u6/S0_1/CY4_0/CY4_33/ONE ), .OUT (\add_24/u6/S0_1/CY4_0/C0 ));
    X_BUF \add_24/u6/S0_1/CY4_0/CY4_33/C1BUF  (.IN 
    (\add_24/u6/S0_1/CY4_0/CY4_33/ZERO ), .OUT (\add_24/u6/S0_1/CY4_0/C1 ));
    X_BUF \add_24/u6/S0_1/CY4_0/CY4_33/C2BUF  (.IN 
    (\add_24/u6/S0_1/CY4_0/CY4_33/ZERO ), .OUT (\add_24/u6/S0_1/CY4_0/C2 ));
    X_BUF \add_24/u6/S0_1/CY4_0/CY4_33/C3BUF  (.IN 
    (\add_24/u6/S0_1/CY4_0/CY4_33/ZERO ), .OUT (\add_24/u6/S0_1/CY4_0/C3 ));
    X_BUF \add_24/u6/S0_1/CY4_0/CY4_33/C4BUF  (.IN 
    (\add_24/u6/S0_1/CY4_0/CY4_33/ONE ), .OUT (\add_24/u6/S0_1/CY4_0/C4 ));
    X_BUF \add_24/u6/S0_1/CY4_0/CY4_33/C5BUF  (.IN 
    (\add_24/u6/S0_1/CY4_0/CY4_33/ONE ), .OUT (\add_24/u6/S0_1/CY4_0/C5 ));
    X_BUF \add_24/u6/S0_1/CY4_0/CY4_33/C6BUF  (.IN 
    (\add_24/u6/S0_1/CY4_0/CY4_33/ONE ), .OUT (\add_24/u6/S0_1/CY4_0/C6 ));
    X_BUF \add_24/u6/S0_1/CY4_0/CY4_33/C7BUF  (.IN 
    (\add_24/u6/S0_1/CY4_0/CY4_33/ZERO ), .OUT (\add_24/u6/S0_1/CY4_0/C7 ));
    X_ZERO \add_24/u6/S0_1/CY4_0/CY4_33/X_ZERO  (.OUT 
    (\add_24/u6/S0_1/CY4_0/CY4_33/ZERO ));
    X_ONE \add_24/u6/S0_1/CY4_0/CY4_33/X_ONE  (.OUT 
    (\add_24/u6/S0_1/CY4_0/CY4_33/ONE ));
    X_XOR2 \add_24/u6/S0_1/XOR3_G_SUM_1/UPCNT37<3>/2_0  (.IN0 
    (\add_24/u6/S0_1/XOR3_G_SUM_1/UPCNT37[3]/2_0_0_INV ), .IN1 
    (\add_24/u6/S0_1/CO_3 ), .OUT (\add_24/u6/S0_1/XOR3_G_SUM_1/2_0 ));
    X_XOR2 \add_24/u6/S0_1/XOR3_G_SUM_1/UPCNT37<3>  (.IN0 
    (\add_24/u6/S0_1/XOR3_G_SUM_1/2_0 ), .IN1 (n165), .OUT (UPCNT37[3]));
    X_XOR2 \add_24/u6/S0_1/XOR2_F_SUM_1/UPCNT37<2>/2_0  (.IN0 
    (\add_24/u6/S0_1/XOR2_F_SUM_1/UPCNT37[2]/2_0_0_INV ), .IN1 
    (\add_24/u6/S0_1/CO_2 ), .OUT (\add_24/u6/S0_1/XOR2_F_SUM_1/2_0 ));
    X_XOR2 \add_24/u6/S0_1/XOR2_F_SUM_1/UPCNT37<2>  (.IN0 
    (\add_24/u6/S0_1/XOR2_F_SUM_1/2_0 ), .IN1 (n166), .OUT (UPCNT37[2]));
    X_XOR2 \add_24/u6/S0_1/XOR1_G_SUM_0/UPCNT37<1>/2_0  (.IN0 
    (\add_24/u6/S0_1/XOR1_G_SUM_0/UPCNT37[1]/2_0_0_INV ), .IN1 
    (\add_24/u6/S0_1/CO_1 ), .OUT (\add_24/u6/S0_1/XOR1_G_SUM_0/2_0 ));
    X_XOR2 \add_24/u6/S0_1/XOR1_G_SUM_0/UPCNT37<1>  (.IN0 
    (\add_24/u6/S0_1/XOR1_G_SUM_0/2_0 ), .IN1 (n167), .OUT (UPCNT37[1]));
    X_INV \sub_25/u6/S0_1/INV1_F_SUM_0  (.IN (n172), .OUT (DNCNT44[0]));
    X_AND3 \sub_25/u6/S0_1/CY4_1/CY4/AND3_A_212  (.IN0 
    (\sub_25/u6/S0_1/CY4_1/C7 ), .IN1 (\sub_25/u6/S0_1/CY4_1/CY4/AND3_A_1_INV )
    , .IN2 (\sub_25/u6/S0_1/CY4_1/CY4/AND3_A_2_INV ), .OUT 
    (\sub_25/u6/S0_1/CY4_1/CY4/AND3_A ));
    X_AND3 \sub_25/u6/S0_1/CY4_1/CY4/AND3_B_213  (.IN0 
    (\sub_25/u6/S0_1/CY4_1/CY4/AND3_B_0_INV ), .IN1 (\sub_25/u6/S0_1/CY4_1/C5 )
    , .IN2 (\sub_25/u6/S0_1/CY4_1/CY4/AND3_B_2_INV ), .OUT 
    (\sub_25/u6/S0_1/CY4_1/CY4/AND3_B ));
    X_AND3 \sub_25/u6/S0_1/CY4_1/CY4/AND3_C_214  (.IN0 (n170), .IN1 
    (\sub_25/u6/S0_1/CY4_1/C5 ), .IN2 (\sub_25/u6/S0_1/CY4_1/C4 ), .OUT 
    (\sub_25/u6/S0_1/CY4_1/CY4/AND3_C ));
    X_OR3 \sub_25/u6/S0_1/CY4_1/CY4/MUXC_OUT_215  (.IN0 
    (\sub_25/u6/S0_1/CY4_1/CY4/AND3_A ), .IN1 
    (\sub_25/u6/S0_1/CY4_1/CY4/AND3_B ), .IN2 
    (\sub_25/u6/S0_1/CY4_1/CY4/AND3_C ), .OUT 
    (\sub_25/u6/S0_1/CY4_1/CY4/MUXC_OUT ));
    X_AND2 \sub_25/u6/S0_1/CY4_1/CY4/C1_AND_216  (.IN0 
    (\sub_25/u6/S0_1/CY4_1/C1 ), .IN1 (\sub_25/u6/S0_1/CY4_1/CY4/C1_AND_1_INV )
    , .OUT (\sub_25/u6/S0_1/CY4_1/CY4/C1_AND ));
    X_AND2 \sub_25/u6/S0_1/CY4_1/CY4/C0_AND_217  (.IN0 
    (\sub_25/u6/S0_1/CY4_1/C0 ), .IN1 (\sub_25/n20 ), .OUT 
    (\sub_25/u6/S0_1/CY4_1/CY4/C0_AND ));
    X_OR2 \sub_25/u6/S0_1/CY4_1/CY4/MUXA_OUT_218  (.IN0 
    (\sub_25/u6/S0_1/CY4_1/CY4/C0_AND ), .IN1 
    (\sub_25/u6/S0_1/CY4_1/CY4/C1_AND ), .OUT 
    (\sub_25/u6/S0_1/CY4_1/CY4/MUXA_OUT_2_INV ));
    X_AND2 \sub_25/u6/S0_1/CY4_1/CY4/F2_AND_219  (.IN0 (VCC), .IN1 
    (\sub_25/u6/S0_1/CY4_1/C7 ), .OUT (\sub_25/u6/S0_1/CY4_1/CY4/F2_AND ));
    X_XOR2 \sub_25/u6/S0_1/CY4_1/CY4/F2_XOR_220  (.IN0 
    (\sub_25/u6/S0_1/CY4_1/CY4/F2_AND ), .IN1 
    (\sub_25/u6/S0_1/CY4_1/CY4/MUXA_OUT ), .OUT 
    (\sub_25/u6/S0_1/CY4_1/CY4/F2_XOR ));
    X_XOR2 \sub_25/u6/S0_1/CY4_1/CY4/F1_XOR_221  (.IN0 
    (\sub_25/u6/S0_1/CY4_1/CY4/F2_XOR ), .IN1 (n170), .OUT 
    (\sub_25/u6/S0_1/CY4_1/CY4/F1_XOR ));
    X_AND2 \sub_25/u6/S0_1/CY4_1/CY4/C2_AND_222  (.IN0 
    (\sub_25/u6/S0_1/CY4_1/C2 ), .IN1 (\sub_25/u6/S0_1/CY4_1/CY4/C2_AND_1_INV )
    , .OUT (\sub_25/u6/S0_1/CY4_1/CY4/C2_AND ));
    X_AND2 \sub_25/u6/S0_1/CY4_1/CY4/C3_AND_223  (.IN0 
    (\sub_25/u6/S0_1/CY4_1/C3 ), .IN1 (\sub_25/u6/S0_1/CY4_1/CY4/F1_XOR ), .OUT 
    (\sub_25/u6/S0_1/CY4_1/CY4/C3_AND ));
    X_OR2 \sub_25/u6/S0_1/CY4_1/CY4/MUXB_OUT_224  (.IN0 
    (\sub_25/u6/S0_1/CY4_1/CY4/C2_AND ), .IN1 
    (\sub_25/u6/S0_1/CY4_1/CY4/C3_AND ), .OUT 
    (\sub_25/u6/S0_1/CY4_1/CY4/MUXB_OUT ));
    X_AND2 \sub_25/u6/S0_1/CY4_1/CY4/CIN_AND_225  (.IN0 (\sub_25/u6/S0_1/CO_2 )
    , .IN1 (\sub_25/u6/S0_1/CY4_1/CY4/MUXB_OUT ), .OUT 
    (\sub_25/u6/S0_1/CY4_1/CY4/CIN_AND ));
    X_AND2 \sub_25/u6/S0_1/CY4_1/CY4/MUXC_AND_226  (.IN0 
    (\sub_25/u6/S0_1/CY4_1/CY4/MUXC_OUT ), .IN1 
    (\sub_25/u6/S0_1/CY4_1/CY4/MUXC_AND_1_INV ), .OUT 
    (\sub_25/u6/S0_1/CY4_1/CY4/MUXC_AND ));
    X_OR2 \sub_25/u6/S0_1/CY4_1/CY4/COUT0  (.IN0 
    (\sub_25/u6/S0_1/CY4_1/CY4/CIN_AND ), .IN1 
    (\sub_25/u6/S0_1/CY4_1/CY4/MUXC_AND ), .OUT (\sub_25/u6/S0_1/CO_3 ));
    X_AND2 \sub_25/u6/S0_1/CY4_1/CY4/G1_AND_228  (.IN0 (VCC), .IN1 
    (\sub_25/u6/S0_1/CY4_1/C7 ), .OUT (\sub_25/u6/S0_1/CY4_1/CY4/G1_AND ));
    X_XOR2 \sub_25/u6/S0_1/CY4_1/CY4/G1_XOR_229  (.IN0 
    (\sub_25/u6/S0_1/CY4_1/CY4/G1_AND ), .IN1 
    (\sub_25/u6/S0_1/CY4_1/CY4/MUXA_OUT ), .OUT 
    (\sub_25/u6/S0_1/CY4_1/CY4/G1_XOR ));
    X_XOR2 \sub_25/u6/S0_1/CY4_1/CY4/G4_XOR_230  (.IN0 
    (\sub_25/u6/S0_1/CY4_1/CY4/G1_XOR ), .IN1 (n169), .OUT 
    (\sub_25/u6/S0_1/CY4_1/CY4/G4_XOR ));
    X_AND2 \sub_25/u6/S0_1/CY4_1/CY4/C6_AND_231  (.IN0 
    (\sub_25/u6/S0_1/CY4_1/C6 ), .IN1 (\sub_25/u6/S0_1/CY4_1/CY4/G4_XOR ), .OUT 
    (\sub_25/u6/S0_1/CY4_1/CY4/C6_AND ));
    X_OR2 \sub_25/u6/S0_1/CY4_1/CY4/C6_OR_232  (.IN0 
    (\sub_25/u6/S0_1/CY4_1/CY4/C6_OR_0_INV ), .IN1 
    (\sub_25/u6/S0_1/CY4_1/CY4/C6_AND ), .OUT (\sub_25/u6/S0_1/CY4_1/CY4/C6_OR )
    );
    X_AND2 \sub_25/u6/S0_1/CY4_1/CY4/COUT0_AND_233  (.IN0 
    (\sub_25/u6/S0_1/CO_3 ), .IN1 (\sub_25/u6/S0_1/CY4_1/CY4/C6_OR ), .OUT 
    (\sub_25/u6/S0_1/CY4_1/CY4/COUT0_AND ));
    X_AND2 \sub_25/u6/S0_1/CY4_1/CY4/G4_AND_234  (.IN0 (n169), .IN1 
    (\sub_25/u6/S0_1/CY4_1/CY4/G4_AND_1_INV ), .OUT 
    (\sub_25/u6/S0_1/CY4_1/CY4/G4_AND ));
    X_OR2 \sub_25/u6/S0_1/CY4_1/CY4/COUT  (.IN0 
    (\sub_25/u6/S0_1/CY4_1/CY4/COUT0_AND ), .IN1 
    (\sub_25/u6/S0_1/CY4_1/CY4/G4_AND ), .OUT (\sub_25/u6/S0_1/CO_4 ));
    X_BUF \sub_25/u6/S0_1/CY4_1/CY4_32/C0BUF  (.IN 
    (\sub_25/u6/S0_1/CY4_1/CY4_32/ONE ), .OUT (\sub_25/u6/S0_1/CY4_1/C0 ));
    X_BUF \sub_25/u6/S0_1/CY4_1/CY4_32/C1BUF  (.IN 
    (\sub_25/u6/S0_1/CY4_1/CY4_32/ZERO ), .OUT (\sub_25/u6/S0_1/CY4_1/C1 ));
    X_BUF \sub_25/u6/S0_1/CY4_1/CY4_32/C2BUF  (.IN 
    (\sub_25/u6/S0_1/CY4_1/CY4_32/ZERO ), .OUT (\sub_25/u6/S0_1/CY4_1/C2 ));
    X_BUF \sub_25/u6/S0_1/CY4_1/CY4_32/C3BUF  (.IN 
    (\sub_25/u6/S0_1/CY4_1/CY4_32/ONE ), .OUT (\sub_25/u6/S0_1/CY4_1/C3 ));
    X_BUF \sub_25/u6/S0_1/CY4_1/CY4_32/C4BUF  (.IN 
    (\sub_25/u6/S0_1/CY4_1/CY4_32/ONE ), .OUT (\sub_25/u6/S0_1/CY4_1/C4 ));
    X_BUF \sub_25/u6/S0_1/CY4_1/CY4_32/C5BUF  (.IN 
    (\sub_25/u6/S0_1/CY4_1/CY4_32/ONE ), .OUT (\sub_25/u6/S0_1/CY4_1/C5 ));
    X_BUF \sub_25/u6/S0_1/CY4_1/CY4_32/C6BUF  (.IN 
    (\sub_25/u6/S0_1/CY4_1/CY4_32/ONE ), .OUT (\sub_25/u6/S0_1/CY4_1/C6 ));
    X_BUF \sub_25/u6/S0_1/CY4_1/CY4_32/C7BUF  (.IN 
    (\sub_25/u6/S0_1/CY4_1/CY4_32/ZERO ), .OUT (\sub_25/u6/S0_1/CY4_1/C7 ));
    X_ZERO \sub_25/u6/S0_1/CY4_1/CY4_32/X_ZERO  (.OUT