time_sim.v

Verilog源码13.rar

// Xilinx Verilog produced by program ngd2ver, Version M1.4.12
// Date: Tue Jan  6 18:42:24 1998
// Design file: time_sim.nga
// Device: 4005epc84-2
`timescale 1 ns/1 ps
`uselib dir=/home/zeppelin2/tech_apps/m1_4.12/verilog/data libext=.vmd

  module gate_reduce (A_CHECK, B_CHECK, RESET, CLOCK, CLKEN, A_TICK, B_TICK, 
  ST_A, ST_B);
    input A_CHECK;
    input B_CHECK;
    input RESET;
    input CLOCK;
    input CLKEN;
    input A_TICK;
    input B_TICK;
    output ST_A;
    output ST_B;

    wire n185, \I_0/lt_130/grnd_sig , \I_0/_Logic1_ , \I_0/_Logic0_ , \I_0/n565 
    , \r337/grnd_sig , n184, n183, n182, n181, \I_1/lt_130/grnd_sig , \I_1/n565 
    , n59, n60, n61, n62, n63, n64, n65, n442, n443, \I_0/n796 , \I_0/ST_INT489 
    , \I_1/ST_INT489 , n197, n199, n198, \I_1/ECNT_E477 , n200, \I_1/CLREVENT , 
    \I_1/n319 , n201, n156, n152, n202, \I_1/E2RQ , n158, \I_0/CLRZERO , 
    \I_0/CLRZERO353 , \I_0/n354 , n203, \I_0/ECNT_E477 , n205, \I_0/n301 , n204
    , \I_0/ECNT_E , n177, n208, n207, n206, \I_0/ZCNT_E638 , n137, \I_0/n336 , 
    n209, n167, n210, n163, n135, \I_0/EQ2 , n213, n212, n211, n165, n166, n216
    , n138, n214, n215, n179, n219, n217, n218, n178, \I_1/CLRZERO , 
    \I_1/CLRZERO353 , \I_1/n354 , n220, n222, n221, n223, \I_0/CLREVENT , 
    \I_0/n319 , n224, n226, n225, n228, n227, n180, \I_1/n336 , n229, n230, n143
    , n150, \I_1/ZCNT_E638 , n149, \I_1/ECNT_E , \I_1/n301 , n231, n232, n136, 
    n160, n159, n233, n235, n234, n237, n144, n236, n176, n240, n238, n239, n175
    , n243, n241, n242, n174, n244, n245, n142, \I_1/EQ2 , n248, n247, n246, 
    n154, n155, n173, n249, n251, n250, n252, n157, n171, n253, n258, n257, n256
    , n254, n255, n261, n260, n259, n139, n262, \I_1/ZCNT_E , \I_1/n345 , n263, 
    n264, n265, n267, n266, \I_0/E2RQ , \I_0/n104 , n268, n269, \I_0/ZCNT_E , 
    \I_0/n345 , n270, n271, n272, n275, n274, n273, \I_1/n104 , n276, n277, n278
    , n279, n280, n281, n282, n284, n283, n286, n285, n287, n289, n288, n293, 
    n291, n290, n292, n295, n294, n299, n297, n296, n298, n301, n300, n305, n303
    , n302, n304, n306, n308, n307, n309, n314, n310, n312, n311, n313, n316, 
    n315, n317, n318, n319, n320, n322, n321, n323, n324, n326, n325, n330, n328
    , n327, n329, n332, n331, n336, n334, n333, n335, n338, n337, n342, n340, 
    n339, n341, n344, n343, n349, n345, n347, n346, n348, n350, n351, n353, n352
    , n354, n356, n355, n357, n359, n358, n360, n362, n361, n363, n365, n364, 
    n366, n367, n369, n368, n370, n372, n371, n373, n375, n374, n376, n378, n377
    , n379, n381, n380, n383, n146, n145, n382, \I_0/n327 , n384, n385, n386, 
    n389, n388, n387, n390, n391, n392, n394, n393, n148, n396, n395, n397, n399
    , n398, \I_1/n327 , \I_1/EQ2326 , n400, n401, n404, n403, n402, n407, n406, 
    n405, n411, n408, n409, n410, n414, n413, n412, n419, n415, n416, n417, n418
    , n422, n421, n420, n427, n423, n424, n425, n426, n432, n431, n428, n430, 
    n429, n433, n441, n440, n434, n435, n436, n439, n437, n438, 
    \I_0/CLRZERO_reg_GSR_OR , \I_0/ST_INT_reg_GSR_OR , \I_0/ECNT_E_reg_GSR_OR , 
    \I_1/CLRZERO_reg_GSR_OR , \I_1/ST_INT_reg_GSR_OR , \I_1/ECNT_E_reg_GSR_OR , 
    \I_1/DCNT_reg[2]_GSR_OR , \I_1/ZCNT_E_reg_GSR_OR , \I_0/E2RQ_reg_GSR_OR , 
    \I_0/ZCNT_E_reg_GSR_OR , \I_1/E2RQ_reg_GSR_OR , \I_1/DCNT_reg[0]_GSR_OR , 
    \I_1/ZCNT_reg[0]_GSR_OR , \I_1/ZCNT_reg[2]_GSR_OR , \I_1/ZCNT_reg[1]_GSR_OR 
    , \I_1/ZCNT_reg[4]_GSR_OR , \I_1/ZCNT_reg[3]_GSR_OR , 
    \I_1/ZCNT_reg[6]_GSR_OR , \I_1/ZCNT_reg[5]_GSR_OR , 
    \I_1/CLREVENT_reg_GSR_OR , \I_0/DCNT_reg[1]_GSR_OR , 
    \I_0/DCNT_reg[0]_GSR_OR , \I_0/CLREVENT_reg_GSR_OR , 
    \I_0/ZCNT_reg[1]_GSR_OR , \I_0/ZCNT_reg[0]_GSR_OR , \I_0/ZCNT_reg[3]_GSR_OR 
    , \I_0/ZCNT_reg[2]_GSR_OR , \I_0/ZCNT_reg[5]_GSR_OR , 
    \I_0/ZCNT_reg[4]_GSR_OR , \I_0/ZCNT_reg[6]_GSR_OR , \I_0/ECNT_reg[0]_GSR_OR 
    , \I_0/ECNT_reg[2]_GSR_OR , \I_0/ECNT_reg[1]_GSR_OR , 
    \I_0/ECNT_reg[4]_GSR_OR , \I_0/ECNT_reg[3]_GSR_OR , \I_1/ECNT_reg[0]_GSR_OR 
    , \I_1/ECNT_reg[2]_GSR_OR , \I_1/ECNT_reg[1]_GSR_OR , 
    \I_1/ECNT_reg[4]_GSR_OR , \I_1/ECNT_reg[3]_GSR_OR , \I_0/EQ2_reg_GSR_OR , 
    \I_0/DCNT_reg[2]_GSR_OR , \I_1/DCNT_reg[1]_GSR_OR , \I_1/EQ2_reg_GSR_OR , 
    \I_1/add_136/u8/S0_1/CO_7 , \I_1/add_136/u8/S0_1/CO_6 , 
    \I_1/add_136/u8/S0_1/CO_5 , \I_1/add_136/u8/S0_1/CO_4 , 
    \I_1/add_136/u8/S0_1/CO_3 , \I_1/add_136/u8/S0_1/CO_2 , 
    \I_1/add_136/u8/S0_1/CO_1 , \I_1/add_136/u8/S0_1/CY4_3/C0 , 
    \I_1/add_136/u8/S0_1/CY4_3/C1 , \I_1/add_136/u8/S0_1/CY4_3/C2 , 
    \I_1/add_136/u8/S0_1/CY4_3/C3 , \I_1/add_136/u8/S0_1/CY4_3/C4 , 
    \I_1/add_136/u8/S0_1/CY4_3/C5 , \I_1/add_136/u8/S0_1/CY4_3/C6 , 
    \I_1/add_136/u8/S0_1/CY4_3/C7 , \I_1/add_136/u8/S0_1/CY4_3/COUT , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/AND3_A , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/AND3_B , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/AND3_C , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/MUXC_OUT , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/C1_AND , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/C0_AND , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/MUXA_OUT , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/F2_AND , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/F2_XOR , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/F1_XOR , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/C2_AND , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/C3_AND , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/MUXB_OUT , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/CIN_AND , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/MUXC_AND , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/G1_AND , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/G1_XOR , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/G4_XOR , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/C6_AND , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/C6_OR , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/COUT0_AND , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4/G4_AND , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4_31/ONE , 
    \I_1/add_136/u8/S0_1/CY4_3/CY4_31/ZERO , \I_1/add_136/u8/S0_1/CY4_2/C0 , 
    \I_1/add_136/u8/S0_1/CY4_2/C1 , \I_1/add_136/u8/S0_1/CY4_2/C2 , 
    \I_1/add_136/u8/S0_1/CY4_2/C3 , \I_1/add_136/u8/S0_1/CY4_2/C4 , 
    \I_1/add_136/u8/S0_1/CY4_2/C5 , \I_1/add_136/u8/S0_1/CY4_2/C6 , 
    \I_1/add_136/u8/S0_1/CY4_2/C7 , \I_1/add_136/u8/S0_1/CY4_2/CY4/AND3_A , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4/AND3_B , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4/AND3_C , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4/MUXC_OUT , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4/C1_AND , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4/C0_AND , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4/MUXA_OUT , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4/F2_AND , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4/F2_XOR , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4/F1_XOR , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4/C2_AND , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4/C3_AND , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4/MUXB_OUT , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4/CIN_AND , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4/MUXC_AND , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4/G1_AND , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4/G1_XOR , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4/G4_XOR , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4/C6_AND , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4/C6_OR , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4/COUT0_AND , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4/G4_AND , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4_32/ONE , 
    \I_1/add_136/u8/S0_1/CY4_2/CY4_32/ZERO , \I_1/add_136/u8/S0_1/CY4_1/C0 , 
    \I_1/add_136/u8/S0_1/CY4_1/C1 , \I_1/add_136/u8/S0_1/CY4_1/C2 , 
    \I_1/add_136/u8/S0_1/CY4_1/C3 , \I_1/add_136/u8/S0_1/CY4_1/C4 , 
    \I_1/add_136/u8/S0_1/CY4_1/C5 , \I_1/add_136/u8/S0_1/CY4_1/C6 , 
    \I_1/add_136/u8/S0_1/CY4_1/C7 , \I_1/add_136/u8/S0_1/CY4_1/CY4/AND3_A , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4/AND3_B , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4/AND3_C , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4/MUXC_OUT , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4/C1_AND , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4/C0_AND , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4/MUXA_OUT , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4/F2_AND , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4/F2_XOR , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4/F1_XOR , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4/C2_AND , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4/C3_AND , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4/MUXB_OUT , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4/CIN_AND , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4/MUXC_AND , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4/G1_AND , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4/G1_XOR , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4/G4_XOR , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4/C6_AND , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4/C6_OR , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4/COUT0_AND , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4/G4_AND , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4_32/ONE , 
    \I_1/add_136/u8/S0_1/CY4_1/CY4_32/ZERO , \I_1/add_136/u8/S0_1/CY4_0/C0 , 
    \I_1/add_136/u8/S0_1/CY4_0/C1 , \I_1/add_136/u8/S0_1/CY4_0/C2 , 
    \I_1/add_136/u8/S0_1/CY4_0/C3 , \I_1/add_136/u8/S0_1/CY4_0/C4 , 
    \I_1/add_136/u8/S0_1/CY4_0/C5 , \I_1/add_136/u8/S0_1/CY4_0/C6 , 
    \I_1/add_136/u8/S0_1/CY4_0/C7 , \I_1/add_136/u8/S0_1/CY4_0/CY4/AND3_A , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4/AND3_B , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4/AND3_C , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4/MUXC_OUT , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4/C1_AND , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4/C0_AND , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4/MUXA_OUT , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4/F2_AND , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4/F2_XOR , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4/F1_XOR , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4/C2_AND , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4/C3_AND , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4/MUXB_OUT , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4/CIN_AND , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4/MUXC_AND , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4/G1_AND , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4/G1_XOR , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4/G4_XOR , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4/C6_AND , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4/C6_OR , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4/COUT0_AND , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4/G4_AND , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4_33/ONE , 
    \I_1/add_136/u8/S0_1/CY4_0/CY4_33/ZERO , 
    \I_1/add_136/u8/S0_1/XOR6_F_SUM_3/2_0 , 
    \I_1/add_136/u8/S0_1/XOR5_G_SUM_2/2_0 , 
    \I_1/add_136/u8/S0_1/XOR4_F_SUM_2/2_0 , 
    \I_1/add_136/u8/S0_1/XOR3_G_SUM_1/2_0 , 
    \I_1/add_136/u8/S0_1/XOR2_F_SUM_1/2_0 , 
    \I_1/add_136/u8/S0_1/XOR1_G_SUM_0/2_0 , \I_0/lt_130/u8/S0/OVFL , 
    \I_0/lt_130/u8/S0/SUB/OR1_CO_5 , \I_0/lt_130/u8/S0/SUB/AND3_CO_5 , 
    \I_0/lt_130/u8/S0/SUB/AND1_CO_5 , \I_0/lt_130/u8/S0/SUB/AND2_CO_5 , 
    \I_0/lt_130/u8/S0/SUB/CO_SIG , \I_0/lt_130/u8/S0/SUB/CO_6 , 
    \I_0/lt_130/u8/S0/SUB/CO_4 , \I_0/lt_130/u8/S0/SUB/CO_2 , 
    \I_0/lt_130/u8/S0/SUB/CO_0 , \I_0/lt_130/u8/S0/SUB/CY4_5/C0 , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/C1 , \I_0/lt_130/u8/S0/SUB/CY4_5/C2 , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/C3 , \I_0/lt_130/u8/S0/SUB/CY4_5/C4 , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/C5 , \I_0/lt_130/u8/S0/SUB/CY4_5/C6 , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/C7 , \I_0/lt_130/u8/S0/SUB/CY4_5/COUT0 , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/COUT , \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/AND3_A , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/AND3_B , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/AND3_C , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/MUXC_OUT , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/C1_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/C0_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/MUXA_OUT , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/F2_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/F2_XOR , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/F1_XOR , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/C2_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/C3_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/MUXB_OUT , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/CIN_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/MUXC_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/G1_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/G1_XOR , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/G4_XOR , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/C6_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/C6_OR , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/COUT0_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4/G4_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4_42/ZERO , 
    \I_0/lt_130/u8/S0/SUB/CY4_5/CY4_42/ONE , \I_0/lt_130/u8/S0/SUB/CY4_4/C0 , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/C1 , \I_0/lt_130/u8/S0/SUB/CY4_4/C2 , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/C3 , \I_0/lt_130/u8/S0/SUB/CY4_4/C4 , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/C5 , \I_0/lt_130/u8/S0/SUB/CY4_4/C6 , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/C7 , \I_0/lt_130/u8/S0/SUB/CY4_4/COUT0 , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/AND3_A , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/AND3_B , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/AND3_C , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/MUXC_OUT , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/C1_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/C0_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/MUXA_OUT , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/F2_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/F2_XOR , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/F1_XOR , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/C2_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/C3_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/MUXB_OUT , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/CIN_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/MUXC_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/G1_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/G1_XOR , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/G4_XOR , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/C6_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/C6_OR , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/COUT0_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4/G4_AND , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4_06/ZERO , 
    \I_0/lt_130/u8/S0/SUB/CY4_4/CY4_06/ONE , \I_0/lt_130/u8/S0/SUB/CY4_3/C0 , 
    \I_0/lt_130/u8/S0/SUB/CY4_3/C1 , \I_0/lt_130/u8/S0/SUB/CY4_3/C2 ,