time_sim.v

Verilog源码13.rar

    X_AND2 U438 (.IN0 (n406), .IN1 (n63), .OUT (U438_2_INV));
    X_OR2 U439 (.IN0 (n172), .IN1 (n408), .OUT (\I_0/n104 ));
    X_AND2 U440 (.IN0 (n191), .IN1 (n186), .OUT (U440_2_INV));
    X_AND2 U441 (.IN0 (n409), .IN1 (\I_0/E2RQ ), .OUT (n410));
    X_OR2 U442 (.IN0 (n438), .IN1 (n410), .OUT (n412));
    X_INV U443 (.IN (n438), .OUT (n411));
    X_AND2 U445 (.IN0 (n418), .IN1 (n143), .OUT (U445_2_INV));
    X_AND2 U446 (.IN0 (n413), .IN1 (n63), .OUT (\I_0/n370 [0]));
    X_OR2 U447 (.IN0 (\I_0/n345 ), .IN1 (\I_0/ZCNT_E ), .OUT (U447_2_INV));
    X_INV U449 (.IN (n416), .OUT (n417));
    X_INV U450 (.IN (n140), .OUT (n415));
    X_AND2 U451 (.IN0 (n415), .IN1 (n59), .OUT (U451_2_INV));
    X_OR2 U452 (.IN0 (n417), .IN1 (n141), .OUT (U452_2_INV));
    X_INV U453 (.IN (n420), .OUT (n419));
    X_AND2 U456 (.IN0 (\I_0/lt_130/AEQB [5]), .IN1 (\I_0/lt_130/AEQB [6]), .OUT 
    (n183));
    X_AND2 U457 (.IN0 (n426), .IN1 (n147), .OUT (U457_2_INV));
    X_AND2 U458 (.IN0 (n421), .IN1 (n63), .OUT (\I_1/n370 [0]));
    X_OR2 U459 (.IN0 (\I_1/n345 ), .IN1 (\I_1/ZCNT_E ), .OUT (U459_2_INV));
    X_INV U461 (.IN (n424), .OUT (n425));
    X_INV U462 (.IN (n144), .OUT (n423));
    X_AND2 U463 (.IN0 (n423), .IN1 (n60), .OUT (U463_2_INV));
    X_OR2 U464 (.IN0 (n425), .IN1 (n145), .OUT (U464_2_INV));
    X_INV U465 (.IN (n428), .OUT (n427));
    X_AND2 U468 (.IN0 (\I_1/lt_130/AEQB [5]), .IN1 (\I_1/lt_130/AEQB [6]), .OUT 
    (n173));
    X_OR2 U469 (.IN0 (n437), .IN1 (n436), .OUT (n429));
    X_AND2 U470 (.IN0 (n429), .IN1 (n63), .OUT (\I_0/n301 ));
    X_INV U471 (.IN (n438), .OUT (n430));
    X_OR2 U472 (.IN0 (\I_0/DCNT [2]), .IN1 (\I_0/DCNT [1]), .OUT (U472_2_INV));
    X_AND2 U473 (.IN0 (\I_0/DCNT [1]), .IN1 (n430), .OUT (n432));
    X_OR2 U475 (.IN0 (\I_0/DCNT [0]), .IN1 (n433), .OUT (n435));
    X_AND2 U476 (.IN0 (\I_0/DCNT [0]), .IN1 (\I_0/DCNT [2]), .OUT (U476_2_INV));
    X_OR2 U477 (.IN0 (n438), .IN1 (\I_0/EQ2 ), .OUT (U477_2_INV));
    X_AND2 U478 (.IN0 (n434), .IN1 (n435), .OUT (U478_2_INV));
    X_IPAD A_CHECK_PAD (.PAD (A_CHECK));
    X_IPAD B_CHECK_PAD (.PAD (B_CHECK));
    X_IPAD RESET_PAD (.PAD (RESET));
    X_IPAD CLOCK_PAD (.PAD (CLOCK));
    X_IPAD CLKEN_PAD (.PAD (CLKEN));
    X_IPAD A_TICK_PAD (.PAD (A_TICK));
    X_IPAD B_TICK_PAD (.PAD (B_TICK));
    X_OPAD ST_A_PAD (.PAD (ST_A));
    X_OPAD ST_B_PAD (.PAD (ST_B));
    X_OR2 \I_0/CLRZERO_reg_GSR_OR_579  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_0/CLRZERO_reg_GSR_OR ));
    X_OR2 \I_0/ST_INT_reg_GSR_OR_580  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_0/ST_INT_reg_GSR_OR ));
    X_OR2 \I_0/ECNT_E_reg_GSR_OR_581  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_0/ECNT_E_reg_GSR_OR ));
    X_OR2 \I_0/ZCNT_E_reg_GSR_OR_582  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_0/ZCNT_E_reg_GSR_OR ));
    X_OR2 \I_0/ECNT_reg<2>_GSR_OR_583  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_0/ECNT_reg[2]_GSR_OR ));
    X_OR2 \I_1/CLRZERO_reg_GSR_OR_584  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_1/CLRZERO_reg_GSR_OR ));
    X_OR2 \I_1/ST_INT_reg_GSR_OR_585  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_1/ST_INT_reg_GSR_OR ));
    X_OR2 \I_1/ECNT_E_reg_GSR_OR_586  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_1/ECNT_E_reg_GSR_OR ));
    X_OR2 \I_1/ZCNT_E_reg_GSR_OR_587  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_1/ZCNT_E_reg_GSR_OR ));
    X_OR2 \I_1/DCNT_reg<2>_GSR_OR_588  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_1/DCNT_reg[2]_GSR_OR ));
    X_OR2 \I_0/ZCNT_reg<1>_GSR_OR_589  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_0/ZCNT_reg[1]_GSR_OR ));
    X_OR2 \I_0/ZCNT_reg<2>_GSR_OR_590  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_0/ZCNT_reg[2]_GSR_OR ));
    X_OR2 \I_0/ECNT_reg<4>_GSR_OR_591  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_0/ECNT_reg[4]_GSR_OR ));
    X_OR2 \I_0/ECNT_reg<1>_GSR_OR_592  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_0/ECNT_reg[1]_GSR_OR ));
    X_OR2 \I_1/ZCNT_reg<1>_GSR_OR_593  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_1/ZCNT_reg[1]_GSR_OR ));
    X_OR2 \I_1/ZCNT_reg<2>_GSR_OR_594  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_1/ZCNT_reg[2]_GSR_OR ));
    X_OR2 \I_1/ECNT_reg<4>_GSR_OR_595  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_1/ECNT_reg[4]_GSR_OR ));
    X_OR2 \I_1/ECNT_reg<1>_GSR_OR_596  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_1/ECNT_reg[1]_GSR_OR ));
    X_OR2 \I_0/CLREVENT_reg_GSR_OR_597  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_0/CLREVENT_reg_GSR_OR ));
    X_OR2 \I_1/CLREVENT_reg_GSR_OR_598  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_1/CLREVENT_reg_GSR_OR ));
    X_OR2 \I_1/ZCNT_reg<0>_GSR_OR_599  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_1/ZCNT_reg[0]_GSR_OR ));
    X_OR2 \I_0/ZCNT_reg<0>_GSR_OR_600  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_0/ZCNT_reg[0]_GSR_OR ));
    X_OR2 \I_0/ECNT_reg<0>_GSR_OR_601  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_0/ECNT_reg[0]_GSR_OR ));
    X_OR2 \I_1/ECNT_reg<0>_GSR_OR_602  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_1/ECNT_reg[0]_GSR_OR ));
    X_OR2 \I_0/E2RQ_reg_GSR_OR_603  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_0/E2RQ_reg_GSR_OR ));
    X_OR2 \I_1/ECNT_reg<2>_GSR_OR_604  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_1/ECNT_reg[2]_GSR_OR ));
    X_OR2 \I_1/E2RQ_reg_GSR_OR_605  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_1/E2RQ_reg_GSR_OR ));
    X_OR2 \I_1/DCNT_reg<0>_GSR_OR_606  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_1/DCNT_reg[0]_GSR_OR ));
    X_OR2 \I_1/ZCNT_reg<4>_GSR_OR_607  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_1/ZCNT_reg[4]_GSR_OR ));
    X_OR2 \I_1/ZCNT_reg<6>_GSR_OR_608  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_1/ZCNT_reg[6]_GSR_OR ));
    X_OR2 \I_0/DCNT_reg<0>_GSR_OR_609  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_0/DCNT_reg[0]_GSR_OR ));
    X_OR2 \I_0/DCNT_reg<2>_GSR_OR_610  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_0/DCNT_reg[2]_GSR_OR ));
    X_OR2 \I_0/ZCNT_reg<4>_GSR_OR_611  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_0/ZCNT_reg[4]_GSR_OR ));
    X_OR2 \I_0/ZCNT_reg<6>_GSR_OR_612  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_0/ZCNT_reg[6]_GSR_OR ));
    X_OR2 \I_0/EQ2_reg_GSR_OR_613  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_0/EQ2_reg_GSR_OR ));
    X_OR2 \I_1/EQ2_reg_GSR_OR_616  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_1/EQ2_reg_GSR_OR ));
    X_OR2 \I_1/DCNT_reg<1>_GSR_OR_617  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_1/DCNT_reg[1]_GSR_OR ));
    X_OR2 \I_1/ZCNT_reg<3>_GSR_OR_618  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_1/ZCNT_reg[3]_GSR_OR ));
    X_OR2 \I_1/ZCNT_reg<5>_GSR_OR_619  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_1/ZCNT_reg[5]_GSR_OR ));
    X_OR2 \I_0/DCNT_reg<1>_GSR_OR_620  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_0/DCNT_reg[1]_GSR_OR ));
    X_OR2 \I_0/ZCNT_reg<3>_GSR_OR_621  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_0/ZCNT_reg[3]_GSR_OR ));
    X_OR2 \I_0/ZCNT_reg<5>_GSR_OR_622  (.IN0 (\I_0/n796 ), .IN1 (GSR), .OUT 
    (\I_0/ZCNT_reg[5]_GSR_OR ));
    X_BUF \U180/$1I20  (.IN (n438), .OUT (\U180/$1I20_GTS_TRI ));
    X_TRI \U180/$1I20_GTS_TRI_623  (.IN (\U180/$1I20_GTS_TRI ), .OUT (ST_A), 
    .CTL (\U180/$1I20_GTS_TRI_2_INV ));
    X_BUF \U181/$1I20  (.IN (n439), .OUT (\U181/$1I20_GTS_TRI ));
    X_TRI \U181/$1I20_GTS_TRI_624  (.IN (\U181/$1I20_GTS_TRI ), .OUT (ST_B), 
    .CTL (\U181/$1I20_GTS_TRI_2_INV ));
    X_CKBUF \U176/clkbuf  (.IN (\U176/clkio_bufsig ), .OUT (n62));
    X_BUF \U176/clkio_buf  (.IN (CLOCK), .OUT (\U176/clkio_bufsig ));
    X_AND2 \U186/n180/2_0  (.IN0 (n179), .IN1 (n218), .OUT (\U186/2_0 ));
    X_AND2 \U186/n180  (.IN0 (\U186/2_0 ), .IN1 (n65), .OUT (n180));
    X_OR2 \U187/n179/2_0  (.IN0 (\I_1/ECNT [1]), .IN1 (\I_1/ECNT [3]), .OUT 
    (\U187/2_0 ));
    X_OR2 \U187/n179  (.IN0 (\U187/2_0 ), .IN1 (\I_1/ECNT [2]), .OUT 
    (\U187/n179_2_INV ));
    X_AND2 \U189/n191/2_0  (.IN0 (n189), .IN1 (n219), .OUT (\U189/2_0 ));
    X_AND2 \U189/n191  (.IN0 (\U189/2_0 ), .IN1 (n64), .OUT (n191));
    X_OR2 \U190/n189/2_0  (.IN0 (\I_0/ECNT [1]), .IN1 (\I_0/ECNT [3]), .OUT 
    (\U190/2_0 ));
    X_OR2 \U190/n189  (.IN0 (\U190/2_0 ), .IN1 (\I_0/ECNT [2]), .OUT 
    (\U190/n189_2_INV ));
    X_AND2 \U192/I_0/n345/2_0  (.IN0 (n438), .IN1 (n220), .OUT (\U192/2_0 ));
    X_AND2 \U192/I_0/n345  (.IN0 (\U192/2_0 ), .IN1 (n63), .OUT (\I_0/n345 ));
    X_AND2 \U194/I_1/n345/2_0  (.IN0 (n439), .IN1 (n221), .OUT (\U194/2_0 ));
    X_AND2 \U194/I_1/n345  (.IN0 (\U194/2_0 ), .IN1 (n63), .OUT (\I_1/n345 ));
    X_OR2 \U196/n176/2_0  (.IN0 (n222), .IN1 (\I_1/DCNT [1]), .OUT (\U196/2_0 )
    );
    X_OR2 \U196/n176  (.IN0 (\U196/2_0 ), .IN1 (\I_1/DCNT [0]), .OUT 
    (\U196/n176_2_INV ));
    X_OR2 \U197/n223/2_0  (.IN0 (\I_1/ZCNT [3]), .IN1 (\I_1/lt_130/AEQB [2]), 
    .OUT (\U197/2_0 ));
    X_OR2 \U197/n223  (.IN0 (\U197/2_0 ), .IN1 (\I_1/ZCNT [4]), .OUT (n223));
    X_AND2 \U200/n225/2_0  (.IN0 (n189), .IN1 (n224), .OUT (\U200/2_0 ));
    X_AND2 \U200/n225  (.IN0 (\U200/2_0 ), .IN1 (\I_0/ECNT [4]), .OUT 
    (\U200/n225_2_INV ));
    X_OR2 \U203/n186/2_0  (.IN0 (n226), .IN1 (\I_0/DCNT [1]), .OUT (\U203/2_0 )
    );
    X_OR2 \U203/n186  (.IN0 (\U203/2_0 ), .IN1 (\I_0/DCNT [0]), .OUT 
    (\U203/n186_2_INV ));
    X_AND2 \U209/n198/2_0  (.IN0 (n231), .IN1 (n230), .OUT (\U209/2_0 ));
    X_AND2 \U209/n198/2_1  (.IN0 (n229), .IN1 (n228), .OUT (\U209/2_1 ));
    X_AND2 \U209/n198  (.IN0 (\U209/2_0 ), .IN1 (\U209/2_1 ), .OUT 
    (\U209/n198_2_INV ));
    X_AND2 \U212/n233/2_0  (.IN0 (\I_1/n310 [0]), .IN1 (n232), .OUT (\U212/2_0 )
    );
    X_AND2 \U212/n233  (.IN0 (\U212/2_0 ), .IN1 (n439), .OUT (\U212/n233_2_INV )
    );
    X_AND2 \U217/n201/2_0  (.IN0 (n237), .IN1 (n236), .OUT (\U217/2_0 ));
    X_AND2 \U217/n201  (.IN0 (\U217/2_0 ), .IN1 (n60), .OUT (\U217/n201_2_INV )
    );
    X_OR2 \U222/n157/2_0  (.IN0 (n240), .IN1 (n239), .OUT (\U222/2_0 ));
    X_OR2 \U222/n157/2_1  (.IN0 (n439), .IN1 (\I_1/EQ2 ), .OUT (\U222/2_1 ));
    X_OR2 \U222/n157  (.IN0 (\U222/2_0 ), .IN1 (\U222/2_1 ), .OUT 
    (\U222/n157_2_INV ));
    X_AND2 \U225/n242/2_0  (.IN0 (n179), .IN1 (n241), .OUT (\U225/2_0 ));
    X_AND2 \U225/n242  (.IN0 (\U225/2_0 ), .IN1 (\I_1/ECNT [4]), .OUT 
    (\U225/n242_2_INV ));
    X_OR2 \U230/n155/2_0  (.IN0 (n190), .IN1 (n246), .OUT (\U230/2_0 ));
    X_OR2 \U230/n155  (.IN0 (\U230/2_0 ), .IN1 (n245), .OUT (\U230/n155_2_INV )
    );
    X_AND2 \U233/n248/2_0  (.IN0 (\I_0/n310 [0]), .IN1 (n247), .OUT (\U233/2_0 )
    );
    X_AND2 \U233/n248  (.IN0 (\U233/2_0 ), .IN1 (n438), .OUT (\U233/n248_2_INV )
    );
    X_OR2 \U237/n149/2_0  (.IN0 (n251), .IN1 (n250), .OUT (\U237/2_0 ));
    X_OR2 \U237/n149/2_1  (.IN0 (\I_0/ZCNT_E638 ), .IN1 (n184), .OUT 
    (\U237/2_1 ));
    X_OR2 \U237/n149  (.IN0 (\U237/2_0 ), .IN1 (\U237/2_1 ), .OUT (n149));
    X_OR2 \U240/n158/2_0  (.IN0 (n253), .IN1 (n252), .OUT (\U240/2_0 ));
    X_OR2 \U240/n158/2_1  (.IN0 (\I_1/ZCNT_E638 ), .IN1 (n174), .OUT 
    (\U240/2_1 ));
    X_OR2 \U240/n158  (.IN0 (\U240/2_0 ), .IN1 (\U240/2_1 ), .OUT (n158));
    X_AND2 \U247/n164/2_0  (.IN0 (\I_0/ECNT110 [1]), .IN1 (n258), .OUT 
    (\U247/2_0 ));
    X_AND2 \U247/n164  (.IN0 (\U247/2_0 ), .IN1 (n63), .OUT (\U247/n164_2_INV )
    );
    X_OR2 \U258/n148/2_0  (.IN0 (n266), .IN1 (n265), .OUT (\U258/2_0 ));
    X_OR2 \U258/n148/2_1  (.IN0 (\I_0/EQ2 ), .IN1 (n438), .OUT (\U258/2_1 ));
    X_OR2 \U258/n148  (.IN0 (\U258/2_0 ), .IN1 (\U258/2_1 ), .OUT 
    (\U258/n148_2_INV ));
    X_AND2 \U260/I_0/ZCNT_E638/2_0  (.IN0 (\I_0/DCNT [1]), .IN1 (\I_0/DCNT [0])
    , .OUT (\U260/2_0 ));
    X_AND2 \U260/I_0/ZCNT_E638  (.IN0 (\U260/2_0 ), .IN1 (n267), .OUT 
    (\U260/I_0/ZCNT_E638_2_INV ));
    X_AND2 \U267/n153/2_0  (.IN0 (\I_1/ECNT110 [1]), .IN1 (n272), .OUT 
    (\U267/2_0 ));
    X_AND2 \U267/n153  (.IN0 (\U267/2_0 ), .IN1 (n63), .OUT (\U267/n153_2_INV )
    );
    X_AND2 \U280/I_1/ZCNT_E638/2_0  (.IN0 (\I_1/DCNT [1]), .IN1 (\I_1/DCNT [0])