📄 hal_arch.h
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#ifndef CYGONCE_HAL_ARCH_H#define CYGONCE_HAL_ARCH_H//==========================================================================//// hal_arch.h//// Architecture specific abstractions////==========================================================================//####COPYRIGHTBEGIN####// // ------------------------------------------- // The contents of this file are subject to the Red Hat eCos Public License // Version 1.1 (the "License"); you may not use this file except in // compliance with the License. You may obtain a copy of the License at // http://www.redhat.com/ // // Software distributed under the License is distributed on an "AS IS" // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the // License for the specific language governing rights and limitations under // the License. // // The Original Code is eCos - Embedded Configurable Operating System, // released September 30, 1998. // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are // Copyright (C) 1998, 1999, 2000 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND####//==========================================================================//#####DESCRIPTIONBEGIN####//// Author(s): nickg, gthomas, hmt// Contributors: nickg, gthomas, hmt// Date: 1999-02-20// Purpose: Define architecture abstractions// Usage: #include <cyg/hal/hal_arch.h>// //####DESCRIPTIONEND####////==========================================================================#include <pkgconf/hal.h>#include <pkgconf/hal_sparclite.h>#include <cyg/infra/cyg_type.h>#include <cyg/hal/hal_intr.h> // HAL_DISABLE_INTERRUPTS//--------------------------------------------------------------------------// Processor saved states://// All these structures must be doubleword (64 bit) aligned.// The code that creates them on the stack will ensure this is so.#define HAL_THREAD_CONTEXT_GLOBAL_BASE 0#define HAL_THREAD_CONTEXT_OUT_BASE 8#define HAL_THREAD_CONTEXT_LOCAL_BASE 16#define HAL_THREAD_CONTEXT_IN_BASE 24typedef struct { // this is the save structure found at *(stack_ptr) always, note that // i[6] is the frame pointer is the previous stack pointer, and // o[6] is the stack pointer is the next frame pointer, // so they form a linked list back up the call stack. cyg_uint32 l[8]; /* Locals r16-r23 */ cyg_uint32 i[8]; /* Ins r24-r31 */} HAL_SavedWindow;typedef struct { // Window save at stack pointer HAL_SavedWindow li;//16 // This is the rest of the save state: // NOTE: g[0] is used for the CWP, for %g0 == 0. Also note that the // assembler routines must load/store it in the right order. cyg_uint32 g[8] ; /* Globals r0- r7 */ cyg_uint32 o[8] ; /* Outs r8-r15 *///32 words in size// There is no need to save any other state; for example, condition codes,// the PC and NextPC, and Y, are preserved in local registers in the trap// handling window and so preserved in the caller stack frame as viewed// from an ISR. Note that the VSR is jumped to with those locals being set// up (and Y in situ), and it must preserve them itself before calling any// subsequent handlers (ISRs).} HAL_SavedRegisters;typedef struct { // Window save at stack pointer HAL_SavedWindow li; cyg_uint32 composite_return_ptr; /* structure returns */ cyg_uint32 spill_args[6]; /* for callee to store */ cyg_uint32 spare; /* keep this 64-bits */} HAL_FrameStructure;//--------------------------------------------------------------------------// Exception handling function.// This function is defined by the kernel according to this prototype. It is// invoked from the HAL to deal with any CPU exceptions that the HAL does// not want to deal with itself. It usually invokes the kernel's exception// delivery mechanism.externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data );//--------------------------------------------------------------------------// Bit manipulation macros#define HAL_LSBIT_INDEX(index, mask) \ CYG_MACRO_START \ asm volatile ( \ "scan %1, 0, %%l7;" \ "mov 31, %0;" \ "sub %0, %%l7, %0" \ : "=r"(index) \ : "r"(mask & ~(mask-1)) \ : "l7" \ ); \CYG_MACRO_END#define HAL_MSBIT_INDEX(index, mask) \ CYG_MACRO_START \ asm volatile ( \ "scan %1, 0, %%l7;" \ "mov 31, %0;" \ "sub %0, %%l7, %0" \ : "=r"(index) \ : "r"(mask) \ : "l7" \ ); \CYG_MACRO_END//--------------------------------------------------------------------------// Context Initialization// Initialize the context of a thread.// Arguments:// _sparg_ name of variable containing current sp, will be written with new sp// _thread_ thread object address, passed as argument to entry point// _entry_ entry point address.// _id_ bit pattern used in initializing registers, for debugging.externC CYG_ADDRESShal_thread_init_context( CYG_WORD sparg, CYG_WORD thread, CYG_WORD entry, CYG_WORD id ); #define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_ ) \CYG_MACRO_START \ _sparg_ = hal_thread_init_context( (CYG_WORD)(_sparg_), \ (CYG_WORD)(_thread_), \ (CYG_WORD)(_entry_), \ (CYG_WORD)(_id_) ); \CYG_MACRO_END//---------------------------------------------------------------------------// Context switch macros.// The arguments are pointers to locations where the stack pointer// of the current thread is to be stored, and from where the sp of the// next thread is to be fetched.externC void hal_thread_switch_context( CYG_ADDRESS to, CYG_ADDRESS from );externC void hal_thread_load_context( CYG_ADDRESS to ) __attribute__ ((noreturn));
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