changelog

eCos1.31版

2000-03-20  Jonathan Larmour  <[e-mail]>

	* include/mips-stub.h: Make C++ safe

	* include/hal_cache.h (_hal_asm_mips_cpp_stringize): Add as a separate
	macro because the compiler has got more picky

2000-03-16  Jonathan Larmour  <[e-mail]>

	* src/vectors.S (_start): Set return address to 0 and unconditionally
	jump to cyg_start, so that GDB doesn't get confused with backtraces

2000-03-13  Nick Garnett  <[e-mail]>

	* src/context.S :
	Added jmpbuf_regsize to insulate jumb buffer from changes in
	mips_regsize. This will need extra work if we go to a full 64 bit
	variant, but for now is the simplest solution to this problem.

2000-02-25  Jonathan Larmour  <[e-mail]>

	* include/arch.inc: Add lpc and spc macros to save and restore PC
	* src/context.S (hal_thread_switch_context): Restore RA into PC
	location in context so that thread debugging works

2000-02-23  Jonathan Larmour  <[e-mail]>

	* src/hal_misc.c (hal_idle_thread_action):
	CYG_HAL_MIPS_SIM -> CYGPKG_HAL_MIPS_SIM
	CYG_HAL_MIPS_JMR3904 -> CYGPKG_HAL_MIPS_TX39_JMR3904

	* include/arch.inc: CYG_HAL_MIPS_SIM -> CYGPKG_HAL_MIPS_SIM

2000-02-16  Jesper Skov  <[e-mail]>

	* cdl/hal_mips.cdl: removed fix me.

2000-01-14  Nick Garnett  <[e-mail]>

	* include/hal_arch.h: 
	* include/arch.inc: 
	* src/vectors.S: 
	* src/context.S: 
	Several fixes to allow the GPRs to be saved
	and restored as 64 bit values on some architectures. This is not
	full 64 bit support since it only covers the GPRs, HI and LO,
	there is more to be done in the CP0 registers (however it is a
	start).

1999-12-21  Jonathan Larmour  <[e-mail]>

	* src/vectors.S (__default_exception_vsr): Rename
	CYG_HAL_USE_ROM_MONITOR_CYGMON -> CYGSEM_HAL_USE_ROM_MONITOR_CygMon
	Rename CYG_HAL_ROM_MONITOR -> CYGSEM_HAL_ROM_MONITOR

	* src/hal_misc.c (hal_default_isr): Rename
	CYG_HAL_USE_ROM_MONITOR_CYGMON ->
	CYGSEM_HAL_USE_ROM_MONITOR_CygMon

	* include/arch.inc: Rename CYG_HAL_USE_ROM_MONITOR ->
	CYGSEM_HAL_USE_ROM_MONITOR

1999-12-20  John Dallaway  <[e-mail]>

	* cdl/hal_mips.cdl:

	Fix syntax error.

1999-12-17  Jonathan Larmour  <[e-mail]>

	* src/mipsfp.c (flt2reg): New inline function to convert between
	float union and register type
	(reg2flt): Likewise in reverse
	(cyg_hal_mips_process_fpe): Handle endianness correctly using the above
	functions. Avoid possible aliasing problems with the compiler. Ensure
	values are zeroed with the correct sign. Check for denormalized operands
	for all remaining FPU opcodes.

	* src/hal_misc.c (cyg_hal_exception_handler): Allow handling of
	unimplemented operation FPU exceptions to be configurable
	* include/pkgconf/hal_mips.h: Provide
	CYGSEM_HAL_MIPS_EMULATE_UNIMPLEMENTED_FPU_OPS to do this
	* cdl/hal_mips.cdl: Likewise

	All the above required for cases 102817 and 102820

1999-12-15  Jonathan Larmour  <[e-mail]>

	* include/hal_intr.h (CYGNUM_HAL_EXCEPTION_COUNT): Ensure you can
	handle FPU exceptions if present
	Reported in case 102817

1999-12-02  John Dallaway  <[e-mail]>

	* cdl/hal_mips.cdl:

	Use the <PACKAGE> token in custom rules.

1999-12-01  John Dallaway  <[e-mail]>

	* cdl/hal_mips.cdl:

	Use the <PREFIX> token in custom rules.

1999-11-04  John Dallaway  <[e-mail]>

	* cdl/hal_mips.cdl:

	Output custom rule dependency information to .deps files in
	the current directory.

	Dispense with the need to create a 'src' sub-directory.

1999-11-04  Nick Garnett  <[e-mail]>

	* src/vectors.S: Added code in reset vector to reset the config0
	register to a known state. This is because on some MIPS variants
	the K0 field comes up in an undefined state.
	[Later] Moved this code to just work in the case of a cold boot.
	NMIs and warm boots should leave it as it was.

1999-11-02  Jesper Skov  <[e-mail]>

	* cdl/hal_mips.cdl: Added.

1999-10-29  Nick Garnett  <[e-mail]>

	* include/pkgconf/hal_mips.h: Added condition to set a
	MIPS-private option (CYGDBG_HAL_MIPS_DEBUG_GDB_CTRLC_SUPPORT) if
	either CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT or
	CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT are defined. In the MIPS HAL
	these are implmented with the same code.

	* src/hal_misc.c: Changed CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT to
	CYGDBG_HAL_MIPS_DEBUG_GDB_CTRLC_SUPPORT.

	* src/vectors.S: Space for old SP after switching to interrupt
	stack must be 8 bytes to preserve alignment of SP. Otherwise any
	nested interrupts or exceptions will get an address error
	exception if the FP regs are saved, which then recurses.
	Changed CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT to
	CYGDBG_HAL_MIPS_DEBUG_GDB_CTRLC_SUPPORT.
	
	* src/mips-stub.c (__is_breakpoint_function): Fixed comparison
	between PC register and label. On 64 bit CPUs these are both 32
	bit values in 64 bit types, but the way that they are generated,
	the PC is zero extended and the label is sign extended. This
	caused them to always differ. Fixed by casting label to unsigned
	long before widening.

1999-10-22  Nick Garnett  <[e-mail]>

	* src/vectors.S: Replaced ifdef with call to hal_intc_translate
	macro so the behaviour here may be customized by variant or
	platform HALs.

	* include/arch.inc: Added default implementations of
	hal_intc_translate macro.

1999-10-05  Nick Garnett  <[e-mail]>

	* include/basetype.h: Made definition of CYG_BYTEORDER dependent
	on definition of CYGPKG_HAL_MIPS_[L|M]SBFIRST.

1999-09-17  Jonathan Larmour  <[e-mail]>

	* src/vectors.S (__default_exception_vsr):
	Rename exception_handler()->cyg_hal_exception_handler()
	After all, we will just do a jump rather than a jal into
	cyg_hal_exception_handler()
	(restore_state): Make the change below (by Hugo) be conditional
	on CYG_HAL_USE_ROM_MONITOR_CYGMON.
	Add explanatory comment about the additions for Cygmon

	* src/hal_misc.c (hal_default_isr): Use new format HAL_DIAG_IRQ_CHECK()
	and check return code is negative; if so, return
	(cyg_hal_exception_handler): Rename from exception_handler()
	Now return cyg_uint32, but default to returning 0 always

1999-09-16  Hugo Tyson  <[e-mail]>

	This set of changes with matching ones in jmr3904 comes from Mark
	Salter's work to make jmr3904 CygMon talk Ethernet.
	
	* src/vectors.S (restore_state): Call CygMon for exceptions or
	unhandled interrupts if CYG_HAL_USE_ROM_MONITOR.  This is why the
	return value from the ISR is preserved.  Don't fully understand
	this.

	* src/hal_misc.c (hal_default_isr): Call into hal_diag via
	HAL_DIAG_IRQ_CHECK if it's defined and CYG_HAL_USE_ROM_MONITOR.
	This lets CygMon check for network interrupts &c.

1999-09-09  Nick Garnett  <[e-mail]>

	* include/arch.inc:
	Moved code to initialize cache out to variant header since it is
	variant specific.

1999-09-08  Jonathan Larmour  <[e-mail]>

	* src/hal_misc.c (exception_handler): Catch exceptions that come from
	within GDB stubs and return if that's what the stubs intend

1999-08-19  Nick Garnett  <[e-mail]>

	* include/hal_io.h: Added include of plf_io.h.

1999-08-10  Jonathan Larmour  <[e-mail]>

	* src/mipsfp.c (cyg_hal_mips_process_fpe): CYG_REPORT_FUNCNAMETYPE()
	must be first in a C file

1999-07-15  Jonathan Larmour  <[e-mail]>

	* include/arch.inc (hal_fpu_save_caller): Save fcr31 first as
	recommended by user's manual
	(hal_fpu_load_caller): Similarly restore fcr31 last

	Rename CYG_HAL_MIPS_FSR_INIT to CYG_HAL_MIPS_FCSR_INIT since that's
	closer to its documented name

	* include/mips-regs.h: 
	Add floating point register definitions, and bitfields/masks for FCR31
	in particular

	* src/mips-stub.c (__single_step):
	Enable FP branch support if the hardware has an FPU.

	Change register access to FCR using HAL macro names from mips-regs.h

	When comparing branch tests with 0, cast the result of get_register()
	to int so that it works on 64-bit MIPS targets even in 32-bit mode,
	when GDB still insists REG_SIZE must be 8 (in which case negative
	results would otherwise go positive)
	
	* src/mipsfp.c: New file to emulate unimplemented MIPS FP operations
	* src/PKGconf.mak (COMPILE): compile it

	* src/hal_misc.c (exception_handler): If we have an FPU and get an FP
	exception, call cyg_hal_mips_process_fpe() from mipsfp.c to process
	it


1999-07-09  Jonathan Larmour  <[e-mail]>

	* include/mips.inc:
	* include/arch.inc:
	* src/vectors.S:
	Rename "cache" register to "cachectrl" to prevent confusion with
	the "cache" instruction.
	For symmetry therefore also rename mipsreg_cache to mipsreg_cachectrl

	* include/arch.inc (hal_cache_init):
	Invalidate caches at startup

	* include/hal_cache.h:
	Allow cache invalidation when cache disabled
	Add _HAL_ASM_SET_MIPS_ISA() to allow use of cache macros in code
	compiled with a MIPS ISA below 3

1999-06-25  Nick Garnett  <[e-mail]>

	* include/arch.inc:
	* include/hal_arch.h:
	Added initializer for FPU FSR register.

1999-06-22  Nick Garnett  <[e-mail]>

	* src/hal_misc.c (hal_default_isr): When chaining, always try the
	ctrlc ISR, the passed-in vector number can be bogus.

1999-06-18  Nick Garnett  <[e-mail]>

	* src/hal_misc.c:
	Added cyg_hal_clock_period variable.	
	
	* include/hal_intr.h:
	Modified HAL_CLOCK_LATENCY() macro to do the right thing.
	Added cyg_hal_clock_period variable.	

	* include/hal_cache.h: Modified implementations of cache macros to
	only do anything if the appropriate cache is enabled.

1999-06-17  Nick Garnett  <[e-mail]>

	* src/vectors.S: Added code to discriminate different entry
	conditions to the reset vector. Added code to translate an NMI
	into a standard exception and added a new vector in the VSR table
	for it.
	Made above code not be present in RAM. Tidied away some debug
	code.

1999-06-11  Jonathan Larmour  <[e-mail]>

	* src/hal_misc.c: Make sure all symbol addresses are given an
	appropriate type that they won't be relocated relative to $gp
	Fix for CR 100800
	
1999-06-10  Nick Garnett  <[e-mail]>

	* include/hal_arch.h: Added macros to copy FPU registers between
	HAL and GDB register save states.

1999-06-08  Nick Garnett  <[e-mail]>

	* src/vectors.S: Dummy __gccmain did not have a delay slot after
	the "jr ra".

	* include/hal_arch.h: Make value of CYGNUM_HAL_STACK_SIZE_TYPICAL
	always be greater than CYGNUM_HAL_STACK_SIZE_MINIMUM.

1999-06-02  Jonathan Larmour  <[e-mail]>

	* src/hal_misc.c (cyg_hal_invoke_constructors): 
	Rework for new constructor scheme for new compilers. Should work
	with old compilers too.

1999-05-28  Nick Garnett  <[e-mail]>

	* src/vectors.S:
	Removed references to CYG_HAL_STARTUP_STUBS.
	Removed some defunct code.

	* include/hal_cache.h (HAL_ICACHE_INVALIDATE_ALL): Fixed typo.

1999-05-27  Nick Garnett  <[e-mail]>

	* src/vectors.S:
	Move call to hal_diag_intr_start to a more useful place.
	Added a save of the current state pointer to memory for ctrl-c
	support. Ensure that exceptions are enabled before calling the ISR
	to allow breakpoints to function.

	* src/mips-stub.c: Imported asynchronous interrupt support from
	libstub/cygmon.

	* include/hal_intr.h: Added HAL_DEFAULT_ISR to contain the name of
	the default ISR.

	* src/hal_misc.c: Added code to call HAL_CTRLC_ISR to default ISR
	if it is enabled. Added some (disabled) debug code.

	* include/hal_cache.h: Added default implementation of
	HAL_DCACHE_IS_ENABLED(). Made use of it in some cache macros.
	Also fixed some typos in some macros.

1999-05-21  Hugo Tyson  <[e-mail]>

	* include/hal_intr.h: Define HAL_INTERRUPT_STACK_BASE and
	HAL_INTERRUPT_STACK_TOP so that stack usage macros in
	kernel/.../stackmon.hxx can work.

	* src/vectors.S (cyg_interrupt_stack_base): Define this symbol for
	the interrupt stack and its friend for the stack top so that we
	can publish them with nice names.

1999-05-21  Nick Garnett  <[e-mail]>

	* src/vectors.S: 
	Rationalized use of "at" and "noat" setting.
	Made use of "lar" where necessary.
	
	* src/mips-stub.c (__install_breakpoints): Added cache flushes to
	ensure that the just-set breakpoint is migrated to main memory and
	will be fetched by the instruction cache.

	* src/context.S:
	Rationalized use of "at" and "noat" setting.

	* include/arch.inc:
	Added initial value for the config0 register and added code to set
	it to hal_cpu_init.
	Added default "lar" macro.

1999-05-16  Gary Thomas  <[e-mail]>