init.s

ADS1.2 samples

;;  Copyright ARM Ltd 2002. All rights reserved.
;;
;;  This code initialises the Integrator board (eg REMAP) before calling 
;;  TCM Initialization and MMU Initialization if they exist.
;;  this allows scatter loading to relocate code into the TCMs
;;
;;  This code must be run from a privileged mode


; --- Standard definitions of mode bits and interrupt (I & F) flags in PSRs

Mode_USR        EQU     0x10
Mode_FIQ        EQU     0x11
Mode_IRQ        EQU     0x12
Mode_SVC        EQU     0x13
Mode_ABT        EQU     0x17
Mode_UND        EQU     0x1B
Mode_SYS        EQU     0x1F ; available on ARM Arch 4 and later

I_Bit           EQU     0x80 ; when I bit is set, IRQ is disabled
F_Bit           EQU     0x40 ; when F bit is set, FIQ is disabled


Len_FIQ_Stack    EQU     256
Len_IRQ_Stack    EQU     256

Offset_FIQ_Stack         EQU     0
Offset_IRQ_Stack         EQU     Offset_FIQ_Stack + Len_FIQ_Stack
Offset_SVC_Stack         EQU     Offset_IRQ_Stack + Len_IRQ_Stack



; --- System memory locations

CM_ctl_reg      EQU     0x1000000C          ; Address of Core Module Control Register
Remap_bit       EQU     0x04                ; Bit 2 is remap bit of CM_ctl

        AREA   INIT, CODE, READONLY   ; name this block of code
        
        ENTRY

        EXPORT  Reset_Handler
Reset_Handler

; --- Perform ROM/RAM remapping, if required
    IF :DEF: ROM_RAM_REMAP

; On reset, an aliased copy of ROM is at 0x0.
; Continue execution from 'real' ROM rather than aliased copy
        LDR     pc, =Instruct_2

Instruct_2

; Remap by setting Remap bit of the CM_ctl register
        LDR     r1, =CM_ctl_reg
        LDR     r0, [r1]
        ORR     r0, r0, #Remap_bit
        STR     r0, [r1]

; RAM is now at 0x0.
; The exception vectors (in vectors.s) must be copied from ROM to the RAM
; The copying is done later by the C library code inside __main

    ENDIF


; stack_base could be defined above, or located in a scatter file
        LDR     r0, stack_base ; 

; Enter each mode in turn and set up the stack pointer
        MSR     CPSR_c, #Mode_FIQ:OR:I_Bit:OR:F_Bit 
        SUB     sp, r0, #Offset_FIQ_Stack

        MSR     CPSR_c, #Mode_IRQ:OR:I_Bit:OR:F_Bit 
        SUB     sp, r0, #Offset_IRQ_Stack
        
        MSR     CPSR_c, #Mode_SVC:OR:I_Bit:OR:F_Bit 
        SUB     sp, r0, #Offset_SVC_Stack
 
; Leave core in SVC mode


        IMPORT  InitTCMentry [WEAK]         ; Import label to TCM init code, but don't fault if not present
        BL      InitTCMentry                ; ignore call if function not present

        IMPORT  InitMMUentry [WEAK]         ; Import label to MMU init code, but don't fault if not present
        BL      InitMMUentry                ; And execute it.


; Branch to C Library entry point

        IMPORT  __main                      ; before MMU enabled import label to __main
        LDR     r12,=__main                 ; save this in register for possible long jump
        
        BX      r12                         ; branch to __main
        
; --- Location and sizes of stacks
		IF :DEF: LOCATIONS_IN_CODE
stack_base	DCD	0x40000
		ELSE
		
		IF :DEF: USE_SCATTER_SYMS
		
		IMPORT      ||Image$$STACK$$ZI$$Base||
		IMPORT      ||Image$$STACK$$ZI$$Limit||

stack_base	DCD     ||Image$$STACK$$ZI$$Limit||
stack_limit	DCD     ||Image$$STACK$$ZI$$Base||

		ELSE
		IMPORT top_of_stacks
stack_base	DCD	top_of_stacks
		ENDIF
		ENDIF

        END                                 ; mark the end of this file