926_build_5.mk

ADS1.2 samples

CC=armcc
AS=armasm
LD=armlink
AR=armar
FE=fromelf


all: dhry.bin
# for Unix
#	@echo Build completed
# for Windows
	@if exist *.bin echo Build completed

rebuild: clean all

clean:
# for Unix
#	rm -f *.o *.axf
# for Windows
	if exist *.o del *.o
	if exist *.axf del *.axf
	if exist *.bin del *.bin


CFLAGS = -c -g -O2 -Otime -DMSC_CLOCK -D__CLK_TCK=1500000 -DSTANDALONE -DSCATTER_PERIP -I..\include
LFLAGS = -info totals -info unused -scatter ..\scatter\926ej-s\embedded_scat.scf -entry Reset_Handler -keep initMMU.o -keep initTCM.o -keep initCache.o
AFLAGS = -g -PD "ROM_RAM_REMAP SETL {TRUE}"

dhry.bin: dhry.axf
	$(FE) dhry.axf -bin -o dhry.bin

dhry.axf: dhry_1.o dhry_2.o retarget.o clock_irq.o serial.o embed_uish.o init.o vectors.o submain.o initTCM.o initMMU.o initCache.o dtcm.o TTB.o stackheap.o uart.o irq.o timer.o ..\scatter\926ej-s\embedded_scat.scf
	$(LD) $(LFLAGS) dhry_1.o dhry_2.o retarget.o clock_irq.o serial.o embed_uish.o init.o vectors.o submain.o initTCM.o initMMU.o initCache.o dtcm.o TTB.o stackheap.o uart.o irq.o timer.o -o dhry.axf

dhry_1.o: ..\Dhrystone\dhry_1.c
	$(CC) $(CFLAGS) ..\Dhrystone\dhry_1.c -o dhry_1.o

dhry_2.o: ..\Dhrystone\dhry_2.c
	$(CC) $(CFLAGS) ..\Dhrystone\dhry_2.c -o dhry_2.o

retarget.o: ..\source\retarget.c
	$(CC) $(CFLAGS) ..\source\retarget.c -o retarget.o

clock_irq.o: ..\source\clock_irq.c
	$(CC) $(CFLAGS) ..\source\clock_irq.c -o clock_irq.o

serial.o: ..\source\serial.c
	$(CC) $(CFLAGS) ..\source\serial.c -o serial.o

embed_uish.o: ..\source\embed_uish.s
	$(AS) $(AFLAGS) ..\source\embed_uish.s

init.o: ..\source\init.s
	$(AS) $(AFLAGS) ..\source\init.s

vectors.o: ..\source\vectors.s
	$(AS) $(AFLAGS) ..\source\vectors.s

submain.o: ..\source\submain.c
	$(CC) $(CFLAGS) -DUSE_SERIAL_PORT ..\source\submain.c -o submain.o

initTCM.o: ..\source\926ej-s\initTCM.s
	$(AS) $(AFLAGS) ..\source\926ej-s\initTCM.s

initMMU.o: ..\source\926ej-s\initMMU.s
	$(AS) $(AFLAGS) ..\source\926ej-s\initMMU.s

initCache.o: ..\source\926ej-s\initCache.s
	$(AS) $(AFLAGS) ..\source\926ej-s\initCache.s

dtcm.o: ..\source\scattersyms\dtcm.s
	$(AS) $(AFLAGS) ..\source\scattersyms\dtcm.s

TTB.o: ..\source\scattersyms\TTB.s
	$(AS) $(AFLAGS) ..\source\scattersyms\TTB.s

stackheap.o: ..\source\scattersyms\stackheap.s
	$(AS) $(AFLAGS) ..\source\scattersyms\stackheap.s

uart.o: ..\source\scattersyms\uart.c
	$(CC) $(CFLAGS) ..\source\scattersyms\uart.c -o uart.o

irq.o: ..\source\scattersyms\irq.c
	$(CC) $(CFLAGS) ..\source\scattersyms\irq.c -o irq.o

timer.o: ..\source\scattersyms\timer.c
	$(CC) $(CFLAGS) ..\source\scattersyms\timer.c -o timer.o