fet430_tb02.c

msp430开发c语言例程

//******************************************************************************
//  MSP-FET430P430 Demo - Timer_B Toggle P5.1, TBCCR0 upmode ISR, DCO SMCLK 
//
//  Description; toggle P5.1 using using software and TB_0 ISR. Timer_B is 
//  configured in upmode, thus the timer will overflow when TBR counts to TBCCR0.  
//  In this example, CCR0 is loaded with 20000. 
//  ACLK = n/a, MCLK = SMCLK = TACLK = DCO = 32xACLK = 1.048576Mhz
//
//           MSP430FG439
//         ---------------
//     /|\|            XIN|-  
//      | |               |
//      --|RST        XOUT|-
//        |               |
//        |           P5.1|-->LED
//
//  M. Buccini
//  Texas Instruments, Inc
//  June 2004
//  Built with IAR Embedded Workbench Version: 2.21B
//******************************************************************************

#include <msp430xG43x.h>

void main(void)
{ 
  WDTCTL = WDTPW + WDTHOLD;             // Stop WDT
  P5DIR |= 0x02;                        // Set P5.1 to output direction
  TBCCTL0 = CCIE;                       // TBCCR0 interrupt enabled
  TBCCR0 = 20000;
  TBCTL = TBSSEL_2 + MC_1;              // SMCLK, upmode

  _BIS_SR(LPM0_bits + GIE);             // Enter LPM0 w/ interrupt
}

// Timer B0 interrupt service routine
#pragma vector=TIMERB0_VECTOR
__interrupt void Timer_B (void)
{
  P5OUT ^= 0x02;                        // Toggle P5.1 using exclusive-OR
}