fet430_tb04.c

msp430开发c语言例程

//******************************************************************************
//  MSP-FET430P430 Demo - Timer_B Toggle P5.1, overflow ISR, 32kHz ACLK 
//
//  Description; Toggle P5.1 using software and the timer_B overflow ISR. 
//  In this example an ISR will trigger when TB overflows.  Inside the ISR P5.1 
//  is toggled.  Toggle rate is exactly 0.25hz.
//  Proper use of TBIV interrupt vector generator demonstrated.
//  ACLK = TBCLK = LFXT1 = 32768, MCLK = SMCLK = DCO = 32xACLK = 1.048576MHz
//  //*An external watch crystal on XIN XOUT is required for ACLK*//	  
//
//           MSP430FG439
//         ---------------
//     /|\|            XIN|-  
//      | |               | 32kHz
//      --|RST        XOUT|-
//        |               |
//        |           P5.1|-->LED
//
//  M. Buccini
//  Texas Instruments, Inc
//  June 2004
//  Built with IAR Embedded Workbench Version: 2.21B
//******************************************************************************

#include <msp430xG43x.h>

void main(void)
{ 
  WDTCTL = WDTPW + WDTHOLD;             // Stop WDT
  FLL_CTL0 |= XCAP14PF;                 // Configure load caps
  P5DIR |= 0x02;                        // Set P5.1 to output direction
  TBCTL = TBSSEL_1 + MC_2 + TBIE;       // ACLK, contmode, interrupt

  _BIS_SR(LPM3_bits + GIE);             // Enter LPM3 w/ interrupt
}

// Timer_B7 Interrupt Vector (TBIV) handler
#pragma vector=TIMERB1_VECTOR
__interrupt void Timer_B(void)
{
 switch( TBIV )
 {
   case  2: break;                      // CCR1 not used
   case  4: break;                      // CCR2 not used
   case 14: P5OUT ^= 0x02;              // overflow
           break;
  }
}