📄 upsd3200.h
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/* `=========================================================================`
***************************************
**** * * ****
Title: uPSD3200
File name: uPSD3200.h
Project name: general
*** ****
****************** * ******************
**** ****
Author: Petr PFEIFER
MPG Prague, Czech Republic
**** * * ****
***************************************
$Version: 0.004 Build: 2004-01-20,17:50:03
Description:
============
Header file for ST 3200 MicroPSD (uPSD) microcontroller.
Updated versions of uPSD3200.h and Upsd_xreg.h
in one file.
Since version 0.003 includes also files
MAP834F2.H, PSD834f2.h and GENERAL.h
Notes:
======
-none
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. ****************** .
. **PPPPPPPPPPPPPPPP .
. *PPPP*******PP**** .
. **PPP********PP*** .
. ***PPP******PP**** .
. *****PPP****PP**** .
. *****PPP****PP**** .
. PPPPPPPP****PP**** R .
. .
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Copyright 2004 ST Microelectronics
This code/file is provided as is and has no warranty,
implied or otherwise. You are free to use/modify any of the provided
code at your own risk in your applications with the expressed limitation
of liability (see below) so long as your product using the code
contains at least one uPSD products (device).
LIMITATION OF LIABILITY:
========================
NEITHER STMicroelectronics NOR ITS VENDORS OR AGENTS
SHALL BE LIABLE FOR ANY LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA,
INTERRUPTION OF BUSINESS, NOR FOR INDIRECT, SPECIAL, INCIDENTAL OR
CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER THIS AGREEMENT OR
OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
=-=-=-=-=-=-=-=-=-=-=-=-=
=-=-=-=-=-=
For current information on uPSD products,
please consult our pages on the World Wide Web:
www.st.com/psm
- - - - - - - - - - - -
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - China - Czech Republic - Finland - France - Germany
Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore
Spain - Sweden - Switzerland - United Kingdom - U.S.A.
http://www.st.com
`========================================================================` */
#ifndef _UPSD_H_
#define _UPSD_H_
typedef struct // general structure of 8 bit register allowing bit access
{
unsigned char bit0 : 1;
unsigned char bit1 : 1;
unsigned char bit2 : 1;
unsigned char bit3 : 1;
unsigned char bit4 : 1;
unsigned char bit5 : 1;
unsigned char bit6 : 1;
unsigned char bit7 : 1;
}
Register;
typedef union // allow bit or byte access to registers
{
char byte;
Register bits;
}
xdata Mix_Reg;
typedef union // allow bit or byte access to registers
{
char byte;
Register bits;
}
SFR_Reg;
/*========================================================================
Standard PSD Registers
========================================================================*/
typedef xdata struct REG_PSD_struct
{
unsigned char DATAIN_A; // PSD_REG_BASE +0x00
unsigned char DATAIN_B; // +0x01
unsigned char CONTROL_A; // +0x02
unsigned char CONTROL_B; // +0x03
unsigned char DATAOUT_A; // +0x04
unsigned char DATAOUT_B; // +0x05
unsigned char DIRECTION_A; // +0x06
unsigned char DIRECTION_B; // +0x07
unsigned char DRIVE_A; // +0x08
unsigned char DRIVE_B; // +0x09
unsigned char IMC_A; // +0x0A
unsigned char IMC_B; // +0x0B
unsigned char OUTENABLE_A; // +0x0C
unsigned char OUTENABLE_B; // +0x0D
unsigned char res2[2]; // spacer
unsigned char DATAIN_C; // +0x10
unsigned char DATAIN_D; // +0x11
unsigned char DATAOUT_C; // +0x12
unsigned char DATAOUT_D; // +0x13
unsigned char DIRECTION_C; // +0x14
unsigned char DIRECTION_D; // +0x15
unsigned char DRIVE_C; // +0x16
unsigned char DRIVE_D; // +0x17
unsigned char IMC_C; // +0x18
unsigned char res1a; // spacer
unsigned char OUTENABLE_C; // +0x1A
unsigned char OUTENABLE_D; // +0x1B
unsigned char res4[4]; // spacer
unsigned char OMC_AB; // +0x20
unsigned char OMC_BC; // +0x21
unsigned char OMCMASK_AB; // +0x22
unsigned char OMCMASK_BC; // +0x23
unsigned char res8c[0x8C]; // spacer
unsigned char PMMR0; // +0xB0
unsigned char res1b; // spacer
unsigned char PMMR1; // +0xB2
unsigned char res1c; // spacer
unsigned char PMMR2; // +0xB4
unsigned char res0B[0x0B]; // spacer
unsigned char MAINPROTECT; // +0xC0
unsigned char res1d; // spacer
unsigned char ALTPROTECT; // +0xC2
unsigned char res4a[4]; // spacer
unsigned char JTAG; // +0xC7
unsigned char res18[0x18]; // spacer
unsigned char PAGE; // +0xE0
unsigned char res1e; // spacer
unsigned char VM; // +0xE2
unsigned char res29[0x1d]; // spacer
}
PSD_REGS;
/*========================================================================
PSD control register bit definitions
========================================================================*/
//PSD PORTA
#define PA0 bit0
#define PA1 bit1
#define PA2 bit2
#define PA3 bit3
#define PA4 bit4
#define PA5 bit5
#define PA6 bit6
#define PA7 bit7
//PSD PORTB
#define PB0 bit0
#define PB1 bit1
#define PB2 bit2
#define PB3 bit3
#define PB4 bit4
#define PB5 bit5
#define PB6 bit6
#define PB7 bit7
//PSD PORTC
#define PC0 bit0
#define PC1 bit1
#define PC2 bit2
#define PC3 bit3
#define PC4 bit4
#define PC5 bit5
#define PC6 bit6
#define PC7 bit7
//PSD PORTD
#define PD0 bit0
#define PD1 bit1
#define PD2 bit2
//PSD JTAG
#define JEN bit0 // JTAG enable
//PSD PMMR0
#define APD_ENABLE bit1
#define PLD_TURBO bit3
#define PLD_ARRAY_CLK bit4
#define PLD_MCELL_CLK bit5
//PSD PMMR2
#define PLD_CNTL0 bit2
#define PLD_CNTL1 bit3
#define PLD_CNTL2 bit4
#define PLD_ALE bit5
#define PLD_DBE bit6
//PSD VM
#define SRAM_CODE bit0
#define EE_CODE bit1
#define FL_CODE bit2
#define EE_DATA bit3
#define FL_DATA bit4
#define PIO_EN bit7
/*============== From the old file PSD834f2.h ==============*/
// Flash parameters
#define NVM_DATA_POLL 0x80 // flash status "data poll" bit at DQ7
#define NVM_DATA_TOGGLE 0x40 // flash status "toggle poll" bit at DQ6
#define NVM_ERROR 0x20 // flash status "error" bit at DQ5
/*============== From the old file MAP834F2.H ==============*/
// Addresses to use to invoke embedded algorithm in FLASH memory. Modify these addresses.
// It is advised to pick a Flash memory address that is common to all memory pages.
#define FLASH_COMMON_XAAA (volatile unsigned char xdata *) 0x9AAA
#define FLASH_COMMON_X555 (volatile unsigned char xdata *) 0x9555
// Addresses to use to invoke embedded algorithm in FLASH boot memory. Modify these addresses.
// It is advised to pick a Flash memory address that is common to all memory pages.
#define FLASH_BOOT_XAAA (volatile unsigned char xdata *) 0x0AAA
#define FLASH_BOOT_X555 (volatile unsigned char xdata *) 0x0555
/*============== From the old file GENERAL.h ==============*/
//-- Data Type Definitions ---------------------------------------------------
typedef unsigned char uchar;
typedef unsigned int uint;
typedef unsigned char BOOL;
#ifndef min
#define min(a,b) (((a)<(b)) ? (a) : (b))
#endif
/*========================================================================
Common Misc. Defines...
========================================================================*/
#ifndef TRUE
#define TRUE 0x01
#endif
#ifndef FALSE
#define FALSE 0x00
#endif
#ifndef ON
#define ON 0x01
#endif
#ifndef OFF
#define OFF 0x00
#endif
#ifndef NULL
#define NULL 0x00
#endif
/*========================================================================
Standard 8051 MCU Registers
========================================================================*/
sfr P0 = 0x80; // Port 0 - Always used for External Memory Access (no access)
/* P1 */
sfr P1 = 0x90; // Port 1
sbit ADC3 = P1^7; // ADC Input 3
sbit ADC2 = P1^6; // ADC Input 2
sbit ADC1 = P1^5; // ADC Input 1
sbit ADC0 = P1^4; // ADC Input 0
sbit TXD2 = P1^3; // USART2
sbit RXD2 = P1^2; // USART2
sbit T2EX = P1^1; // Timer2 Triger
sbit T2 = P1^0; // Timer2 Input
sfr P2 = 0xA0; // Port 2 - Always used for External Memory Access (no access)
/* P3 */
sfr P3 = 0xB0; // Port 3
sbit I2CSC = P3^7; // I2C Serial Clock
sbit I2CSD = P3^6; // I2C Serial Data
sbit T1 = P3^5; // Timer 1 Input
sbit T0 = P3^4; // Timer 0 Input
sbit INT1 = P3^3; // Ext Int 1 / Timer 1 Gate
sbit INT0 = P3^2; // Ext Int 0 / Timer 0 Gate
sbit TXD = P3^1; // USART0
sbit RXD = P3^0; // USART0
/* PSW */
sfr PSW = 0xD0; // Program Status Word
sbit CY = PSW^7; // Carry
sbit AC = PSW^6; // Aux.carry b3 to b4
sbit F0 = PSW^5; // user flag
sbit RS1 = PSW^4; // Rx bank select b1
sbit RS0 = PSW^3; // Rx bank select b0
sbit OV = PSW^2; // Overflow
sbit F1 = PSW^1; // user flag
sbit P = PSW^0; // even parity of accumulator
sfr ACC = 0xE0; // Accumulator
sfr B = 0xF0; // Register B
sfr SP = 0x81; // Stack Pointer
sfr DPL = 0x82; // Data Pointer low byte
sfr DPH = 0x83; // Data Pointer high byt
sfr PCON = 0x87; // MCU Power Control Register
/* TCON */
sfr TCON = 0x88; // Timer / Counter Control
sbit TF1 = TCON^7; // Standard 8051 timer control
sbit TR1 = TCON^6;
sbit TF0 = TCON^5;
sbit TR0 = TCON^4;
sbit IE1 = TCON^3;
sbit IT1 = TCON^2;
sbit IE0 = TCON^1;
sbit IT0 = TCON^0;
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