📄 .#rtk8019as.c.1.3
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/* * Contains the packet driver for the RTK8019as 10megabit ethernet controller * chip. * * IMPORTANT NOTE: Software emulated pullup of the 9346 is not supported. If * you need to use this wire for another purpose this driver * will not currently work without modification. * * (C) 2001 Softools, Inc. * (C) 2001 Compendium Technologies, Inc. * All rights reserved. * * Translated from the Z-World packet driver and used under license. */#include <Rabbit2000.h>#include <string.h>#include "RTK8019AS.h"#include "lwip/stats.h"#define TX_DEBUG// Forward declaration of busy delaystatic void delay_uS(unsigned);/** * This routine detects the EEPROM clock pulse from the RTK8019AS. */static void clock9346(void){// HL' alternate register comes in with the port address#asm ; Save contents of registers ex af,af' exx ld a,(_rtkEESK##) ld e,ah2l:ioi ld a,(hl) and e jr z,h2ll2h:ioi ld a,(hl) and e jr nz,l2h ; Get old registers back exx ex af,af'#endasm}/** * Emulate the EEPROM loading sequence required by the RTK8019AS in * the absence of a real EEPROM. The EEPROM is absent on the RCM21xx * series and also on the micro ethernet RCM2200. It is present on * the TCP/IP dev kit board. */static void emulate9346(void){#asm;; code to emulate the 93C46; ld c,1 ld hl,(_rtkEEPORT##) ld hl',(_rtkEEPORT##) ; For later use in clock9346 functionemu_loop: ld a,(_rtkEEDI##) ld e,a ; ; start bit ;emu_1: lcall $clock9346ioi ld a,(hl) and e jr z,emu_1 ; ; read 10 - read command ;emu_2: lcall $clock9346ioi ld a,(hl) and e jr z,emu_1emu_3: lcall $clock9346ioi ld a,(hl) and e jr nz,emu_1 ; ; six clocks for address ; ld b,6emu_4: lcall $clock9346 djnz emu_4 ; ; send 0 ; ld de,(_rtkEEDO##) xor aioi ld (de),a ; ; send word (16 bits) ; ld a,(_rtkLEDs##) ld b,16emu_5: lcall $clock9346ioi ld (de),a rlca djnz emu_5 dec c jp p,emu_loop xor aioi ld (de),a#endasm}#ifdef DEBUGchar regbuf[64];/** * This routine loads and prints out the contents of the RealTek 8019AS * registers. */void printRealTekRegisters(void){#asm push ix push iy ;; if not a Blue Cheese, only one NIC available ld ix, (_rtkWriteAddress) ld iy, (_rtkReadAddress)ioe ld a,(iy) push af ld de,_regbuf ld a,0x20ioe ld (ix),a ld b,16 ld hl, iyloop1:ioe ld a,(hl) ld (de),a inc hl inc de djnz loop1 ld a,0x60ioe ld (ix),a ld b,16 ld hl,iyloop2:ioe ld a,(hl) ld (de),a inc hl inc de djnz loop2 ld a,0xa0ioe ld (ix),a ld b,16 ld hl,iyloop3:ioe ld a,(hl) ld (de),a inc hl inc de djnz loop3 ld a,0xe0ioe ld (ix),a ld b,16 ld hl,iyloop4:ioe ld a,(hl) ld (de),a inc hl inc de djnz loop4 pop af ld (_regbuf),a pop iy pop ix#endasm printf("CR=%02x\n",regbuf[0]); printf("CLDA0=%02x\tPAR0=%02x\t\tPSTART=%02x\t9346CR=%02x\n", regbuf[1],regbuf[17],regbuf[33],regbuf[49]); printf("CLDA1=%02x\tPAR1=%02x\t\tPSTOP=%02x\tBPAGE=%02x\n", regbuf[2],regbuf[18],regbuf[34],regbuf[50]); printf("BNRY=%02x\t\tPAR2=%02x\t\t\t\tCONFIG0=%02x\n", regbuf[3],regbuf[19],regbuf[51]); printf("TSR=%02x\t\tPAR3=%02x\t\tTPSR=%02x\t\tCONFIG1=%02x\n", regbuf[4],regbuf[20],regbuf[36],regbuf[52]); printf("NCR=%02x\t\tPAR4=%02x\t\t\t\tCONFIG2=%02x\n", regbuf[5],regbuf[21],regbuf[53]); printf("FIFO=%02x\t\tPAR5=%02x\t\t\t\tCONFIG3=%02x\n", regbuf[6],regbuf[22],regbuf[54]); printf("ISR=%02x\t\tCURR=%02x\t\t\t\tTEST1=%02x\n", regbuf[7],regbuf[23],regbuf[55]); printf("CRDA0=%02x\tMAR0=%02x\t\t\t\tCSNSAV=%02x\n", regbuf[8],regbuf[24],regbuf[56]); printf("CRDA1=%02x\tMAR1=%02x\n", regbuf[9],regbuf[25]); printf("8019ID0=%02x\tMAR2=%02x\t\t\t\tTEST2=%02x\n", regbuf[10],regbuf[26],regbuf[58]); printf("8019ID1=%02x\tMAR3=%02x\t\t\t\tINTR=%02x\n", regbuf[11],regbuf[27],regbuf[59]); printf("RSR=%02x\t\tMAR4=%02x\t\tRCR=%02x\n", regbuf[12],regbuf[28],regbuf[44]); printf("CNTR0=%02x\tMAR5=%02x\t\tTCR=%02x\n", regbuf[13],regbuf[29],regbuf[45]); printf("CNTR1=%02x\tMAR6=%02x\t\tDCR=%02x\n", regbuf[14],regbuf[30],regbuf[46]); printf("CNTR2=%02x\tMAR7=%02x\t\tIMR=%02x\n\n", regbuf[16],regbuf[31],regbuf[47]);}#endif /* DEBUG *//** * Initialize the rtk8019as, resetting the interface and getting the ethernet * address. */void RealTekInit(struct netif * interface){ // Set up the Selects and I/O Strobes int macOr; u8_t value;#ifdef DEBUG printf("in RTK8019as init\n");#endif if (rtkBoardType == RTK_BOARD_TYPE_RCM2200) { // RCM2200 ioSrSetBitsI( PEFR, 0x44 ); ioSrSetBitsI( IB2CR, 0x90 ); ioSrSetBitsI( IB6CR, 0xA8 ); ioSrSetBitsI( PEDDR, 0x4C ); ioSrClearBitsI( PDDDR, 0xFC ); ioSrClearBitsI( PDDCR, 0x6F ); ioSrClearBitsI( PDFR, 0x6F ); ioSetBitI( PCDR, 4 ); // Start the reset cycle delay( 1000 ); // Wait 1000ms for reset to complete ioClearBitI( PCDR, 4 ); // End the reset } else if (rtkBoardType == RTK_BOARD_TYPE_RCM2100) { // RCM2100 ioSrSetBitsI( PEDDR, 0x44 ); ioSrSetBitsI( PEFR, 0x44 ); ioSrSetBitsI( IB2CR, 0x90 ); ioSrSetBitsI( IB6CR, 0xA8 ); ioSrSetBitsI( PDDDR, 0x90 ); ioSrClearBitsI( PDDCR, 0x6F ); ioSrClearBitsI( PDFR, 0x6F ); ioSrSetBitI( PDDR, 4 ); // Start the reset cycle delay( 1000 ); // Wait 1000ms for reset to complete ioSrClearBitI( PDDR, 4 ); // End the reset } else { // Assume TCP/IP dev kit oute( PEB1R, 0xFF ); ioSrSetBitsI( PEFR, 0xC0 ); // 7,6 io strobes ioSrSetBitsI( IB7CR, 0x90 ); // Set the io strobes ioSrSetBitsI( IB6CR, 0xA8 ); ioSrSetBitsI( PEDDR, 0xC2 ); ioClearBitsI( PEDR, 0xFD ); oute( PEB1R, 0xFD ); // Enable RealTek // Wait for NIC to reset and establish link... delay( 2000 ); } // Reset loop while(ine(rtkReadAddress) == 0x7E); // No Green Link LED without this delay here on emulated EEPROM boards delay(10); #ifdef DEBUG printf("past reset loop\n");#endif // Read then write to the RESET register value = ine( rtkReadAddress+PD_RESET ); delay_uS( 1600 ); // Wait 1.6ms oute( rtkWriteAddress+PD_RESET, value ); // Reset NIC // Stop the NIC, Abort DMA, page 0 oute( rtkWriteAddress, 0x21 ); // Wait at least 1.6 milliseconds delay_uS( 1600 ); // Poll the reset bit in the INTSTATUS register // Clear out all interrupts oute( rtkWriteAddress+PD_INTSTATUS, 0xFF ); // Clear all sticky int bits if(rtkBoardType == RTK_BOARD_TYPE_DEVKIT) { oute( rtkWriteAddress+PD_INTMASK, 0 ); // Mask out ALL ints // Read contents of the 93C46 into EthAddress // and copy the physical address into the NICs // addresses. This shouldn't be necessary, but // the 93C46 wasn't being properly loaded on bootup // 12 bytes from address 0 oute( rtkWriteAddress+PD_RMTBCNT0, 0x12 ); // Setup dma address/len oute( rtkWriteAddress+PD_RMTBCNT1, 0 ); oute( rtkWriteAddress+PD_RMTSADR0, 0 ); oute( rtkWriteAddress+PD_RMTSADR1, 0 ); oute( rtkWriteAddress, 0x0A ); // Start dma read // Read six bytes into EthAddress for( char i = 0; i < (char) sizeof interface->hwaddr; ++i ) { ine( PD_IOPORT+rtkReadAddress ); interface->hwaddr[i] = ine( PD_IOPORT+rtkReadAddress ); } } else { struct ethernetif *ethif; // Core module ethernets do not have an EEPROM, therefore // emulation must be done to lines attached to the 8019as to act // as if the Rabbit 2000 is the EEPROM.
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