📄 network_main.asm
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;* .T address paths 1* 0
;* Long read paths 0 0
;* Long write paths 0 0
;* Logical ops (.LS) 0 0 (.L or .S unit)
;* Addition ops (.LSD) 2 1 (.L or .S or .D unit)
;* Bound(.L .S .LS) 0 1*
;* Bound(.L .S .D .LS .LSD) 1* 1*
;*
;* Searching for software pipeline schedule at ...
;* ii = 1 Schedule found with 12 iterations in parallel
;*
;* Register Usage Table:
;* +-----------------------------------------------------------------+
;* |AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA|BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB|
;* |00000000001111111111222222222233|00000000001111111111222222222233|
;* |01234567890123456789012345678901|01234567890123456789012345678901|
;* |--------------------------------+--------------------------------|
;* 0: |* * ** |* |
;* +-----------------------------------------------------------------+
;*
;* Done
;*
;* Collapsed epilog stages : 11
;* Prolog not removed
;* Collapsed prolog stages : 0
;*
;* Minimum required memory pad : 11 bytes
;* Minimum threshold value : -mh14
;*
;* Minimum safe trip count : 1
;*----------------------------------------------------------------------------*
;* SETUP CODE
;*
;* MVK 0x1,B0
;* ZERO A6
;*
;* SINGLE SCHEDULED ITERATION
;*
;* C47:
;* 0 LDB .D1T1 *++A3,A0 ; |175| ^
;* 1 NOP 3
;* 4 ADD .L1 1,A5,A5 ; |175| ^
;* 5 [ B0] MV .S1 A5,A6 ; |175| ^
;* || [!A0] ZERO .D2 B0 ; ^
;* 6 [ B0] B .S2 C47 ; |175|
;* 7 NOP 5
;* ; BRANCH OCCURS ; |175|
;*
;* RESTORE CODE
;*
;* MV A6,A5
;*----------------------------------------------------------------------------*
L8: ; PIPED LOOP PROLOG
LDB .D1T1 *++A3,A0 ; |175| (P) <1,0> ^
LDB .D1T1 *++A3,A0 ; |175| (P) <2,0> ^
LDB .D1T1 *++A3,A0 ; |175| (P) <3,0> ^
MVK .D2 0x1,B0
|| ZERO .S1 A6
|| ADD .L1 1,A5,A5 ; |175| (P) <0,4> ^
|| LDB .D1T1 *++A3,A0 ; |175| (P) <4,0> ^
[!A0] ZERO .D2 B0 ; (P) <0,5> ^
|| [ B0] MV .S1 A5,A6 ; |175| (P) <0,5> ^
|| ADD .L1 1,A5,A5 ; |175| (P) <1,4> ^
|| LDB .D1T1 *++A3,A0 ; |175| (P) <5,0> ^
[ B0] B .S2 L9 ; |175| (P) <0,6>
|| [!A0] ZERO .D2 B0 ; (P) <1,5> ^
|| [ B0] MV .S1 A5,A6 ; |175| (P) <1,5> ^
|| ADD .L1 1,A5,A5 ; |175| (P) <2,4> ^
|| LDB .D1T1 *++A3,A0 ; |175| (P) <6,0> ^
[!A0] ZERO .D2 B0 ; (P) <2,5> ^
|| [ B0] MV .S1 A5,A6 ; |175| (P) <2,5> ^
|| ADD .L1 1,A5,A5 ; |175| (P) <3,4> ^
|| LDB .D1T1 *++A3,A0 ; |175| (P) <7,0> ^
|| [ B0] B .S2 L9 ; |175| (P) <1,6>
[ B0] B .S2 L9 ; |175| (P) <2,6>
|| [!A0] ZERO .D2 B0 ; (P) <3,5> ^
|| [ B0] MV .S1 A5,A6 ; |175| (P) <3,5> ^
|| ADD .L1 1,A5,A5 ; |175| (P) <4,4> ^
|| LDB .D1T1 *++A3,A0 ; |175| (P) <8,0> ^
[!A0] ZERO .D2 B0 ; (P) <4,5> ^
|| [ B0] MV .S1 A5,A6 ; |175| (P) <4,5> ^
|| ADD .L1 1,A5,A5 ; |175| (P) <5,4> ^
|| LDB .D1T1 *++A3,A0 ; |175| (P) <9,0> ^
|| [ B0] B .S2 L9 ; |175| (P) <3,6>
[ B0] B .S2 L9 ; |175| (P) <4,6>
|| [!A0] ZERO .D2 B0 ; (P) <5,5> ^
|| [ B0] MV .S1 A5,A6 ; |175| (P) <5,5> ^
|| ADD .L1 1,A5,A5 ; |175| (P) <6,4> ^
|| LDB .D1T1 *++A3,A0 ; |175| (P) <10,0> ^
;** --------------------------------------------------------------------------*
L9: ; PIPED LOOP KERNEL
[ B0] B .S2 L9 ; |175| <5,6>
|| [!A0] ZERO .D2 B0 ; <6,5> ^
|| [ B0] MV .S1 A5,A6 ; |175| <6,5> ^
|| ADD .L1 1,A5,A5 ; |175| <7,4> ^
|| LDB .D1T1 *++A3,A0 ; |175| <11,0> ^
;** --------------------------------------------------------------------------*
L10: ; PIPED LOOP EPILOG
MVK .D1 0xc,A6 ; |176|
|| ZERO .D2 B6 ; |176|
|| MV .L1 A6,A8
|| MVKL .S1 _CfgAddEntry,A3 ; |176|
ZERO .D1 A10 ; |176|
|| MVKH .S1 _CfgAddEntry,A3 ; |176|
NOP 1
MVC .S2 B4,CSR ; interrupts on
MVKL .S2 _HostName,B4 ; |176|
MVKH .S2 _HostName,B4 ; |176|
MVK .L2 0x7,B4 ; |176|
|| LDW .D2T2 *B4,B8 ; |176|
|| CALL .S2X A3 ; |176|
ADDKPC .S2 RL6,B3,4 ; |176|
RL6: ; CALL OCCURS ; |176|
NOP 1
MVKL .S1 _LocalIPAddr,A3 ; |89|
|| MVKL .S2 _inet_addr,B4 ; |89|
MVKH .S1 _LocalIPAddr,A3 ; |89|
|| MVKH .S2 _inet_addr,B4 ; |89|
LDW .D1T1 *A3,A4 ; |89|
|| CALL .S2 B4 ; |89|
ADDKPC .S2 RL7,B3,4 ; |89|
RL7: ; CALL OCCURS ; |89|
;** --------------------------------------------------------------------------*
MVKL .S1 _LocalIPAddr,A14 ; |97|
|| MVKL .S2 _inet_addr,B13 ; |97|
|| ADDAW .D2 SP,13,B7 ; |96|
|| MV .D1 A4,A0 ; |89|
MVKH .S2 _inet_addr,B13 ; |97|
|| MVKL .S1 _LocalIPMask,A13 ; |98|
MVKL .S2 _ServiceReport,B4 ; |133|
|| MV .D1X B7,A4 ; |96|
|| MVK .S1 148,A3 ; |130|
MVKH .S1 _LocalIPMask,A13 ; |98|
|| ADD .D1X A3,SP,A3 ; |130|
|| MVKL .S2 _mmZeroInit,B8 ; |130|
MVKH .S1 _LocalIPAddr,A14 ; |97|
|| MVKH .S2 _mmZeroInit,B8 ; |130|
MVKH .S2 _ServiceReport,B4 ; |133|
MVKL .S2 _CfgAddEntry,B12 ; |134|
MVK .S2 0x50,B4 ; |96|
|| MV .D1X B4,A12 ; |133|
MVKH .S2 _CfgAddEntry,B12 ; |134|
MVKL .S2 _DomainName,B11 ; |184|
[!A0] B .S2 L15 ; |89|
MVKL .S2 _mmZeroInit,B5 ; |96|
MVKL .S2 _inet_addr,B10 ; |98|
MVKH .S2 _mmZeroInit,B5 ; |96|
MVKH .S2 _DomainName,B11 ; |184|
MVKH .S2 _inet_addr,B10 ; |98|
; BRANCH OCCURS ; |89|
;** --------------------------------------------------------------------------*
CALL .S2 B5 ; |96|
ADDKPC .S2 RL8,B3,4 ; |96|
RL8: ; CALL OCCURS ; |96|
CALL .S2 B13 ; |97|
LDW .D1T1 *A14,A4 ; |97|
ADDKPC .S2 RL9,B3,3 ; |97|
RL9: ; CALL OCCURS ; |97|
CALL .S2 B10 ; |98|
LDW .D1T1 *A13,A4 ; |98|
|| MV .S1 A4,A3 ; |97|
ADDKPC .S2 RL10,B3,0 ; |98|
STW .D2T1 A3,*+SP(56) ; |97|
NOP 2
RL10: ; CALL OCCURS ; |98|
LDW .D2T2 *B11,B5 ; |184|
NOP 1
STW .D2T1 A4,*+SP(60) ; |98|
MVK .S2 67,B4 ; |183|
ADD .D2 B4,SP,B4 ; |183|
LDB .D2T2 *B5,B0 ; |186|
NOP 4
[!B0] BNOP .S1 L14,2 ; |186|
[!B0] MVKL .S1 _CfgAddEntry,A3 ; |103|
STB .D2T2 B0,*++B4 ; |186|
NOP 1
; BRANCH OCCURS ; |186|
;** --------------------------------------------------------------------------*
MVC .S2 CSR,B6
LDB .D2T2 *++B5,B0 ; |186| (P) <0,0> ^
|| AND .S2 -2,B6,B7
MVC .S2 B7,CSR ; interrupts off
;*----------------------------------------------------------------------------*
;* SOFTWARE PIPELINE INFORMATION
;*
;* Loop source line : 186
;* Loop closing brace source line : 186
;* Known Minimum Trip Count : 1
;* Known Max Trip Count Factor : 1
;* Loop Carried Dependency Bound(^) : 1
;* Unpartitioned Resource Bound : 1
;* Partitioned Resource Bound(*) : 2
;* Resource Partition:
;* A-side B-side
;* .L units 0 0
;* .S units 1 0
;* .D units 0 2*
;* .M units 0 0
;* .X cross paths 0 0
;* .T address paths 0 2*
;* Long read paths 0 0
;* Long write paths 0 0
;* Logical ops (.LS) 0 0 (.L or .S unit)
;* Addition ops (.LSD) 1 0 (.L or .S or .D unit)
;* Bound(.L .S .LS) 1 0
;* Bound(.L .S .D .LS .LSD) 1 1
;*
;* Searching for software pipeline schedule at ...
;* ii = 2 Schedule found with 6 iterations in parallel
;*
;* Register Usage Table:
;* +-----------------------------------------------------------------+
;* |AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA|BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB|
;* |00000000001111111111222222222233|00000000001111111111222222222233|
;* |01234567890123456789012345678901|01234567890123456789012345678901|
;* |--------------------------------+--------------------------------|
;* 0: |* | ** |
;* 1: |* |* ** |
;* +-----------------------------------------------------------------+
;*
;* Done
;*
;* Collapsed epilog stages : 5
;* Prolog not removed
;* Collapsed prolog stages : 0
;*
;* Minimum required memory pad : 5 bytes
;* Minimum threshold value : -mh14
;*
;* Minimum safe trip count : 1
;*----------------------------------------------------------------------------*
;* SETUP CODE
;*
;* MVK 0x1,A0
;*
;* SINGLE SCHEDULED ITERATION
;*
;* C34:
;* 0 LDB .D2T2 *++B5,B0 ; |186| ^
;* 1 NOP 4
;* 5 [ A0] STB .D2T2 B0,*++B4 ; |186| ^
;* || [!B0] ZERO .D1 A0 ; ^
;* 6 [ A0] B .S1 C34 ; |186|
;* 7 NOP 5
;* ; BRANCH OCCURS ; |186|
;*----------------------------------------------------------------------------*
L11: ; PIPED LOOP PROLOG
LDB .D2T2 *++B5,B0 ; |186| (P) <1,0> ^
NOP 1
MVK .D1 0x1,A0
|| LDB .D2T2 *++B5,B0 ; |186| (P) <2,0> ^
[!B0] ZERO .D1 A0 ; (P) <0,5> ^
|| [ A0] STB .D2T2 B0,*++B4 ; |186| (P) <0,5> ^
LDB .D2T2 *++B5,B0 ; |186| (P) <3,0> ^
|| [ A0] B .S1 L12 ; |186| (P) <0,6>
[!B0] ZERO .D1 A0 ; (P) <1,5> ^
|| [ A0] STB .D2T2 B0,*++B4 ; |186| (P) <1,5> ^
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