📄 jtagpxa250.h
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/* * This file is part of Jelie, * (c) 2002 Julien Pilet <julien.pilet@epfl.ch> and * Stephane Magnenat <stephane.magnenat@epfl.ch> * * Jelie is free software; you can redistribute it * and/or modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of the License, * or (at your option) any later version. * * Jelie is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with Foobar; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA *//*! \file * PXA250 high level JTAG commands. * * \author Julien Pilet <julien.pilet@epfl.ch> * \author Stephane Magnenat <stephane.magnenat@epfl.ch> */#ifndef _JTAGPXA250_H_#define _JTAGPXA250_H_// this file is common for the debugger and the debug handler#include <target_to_host.h>#include <vector>//! path to the debug hanlder binary#define DEBUG_HANDLER_FILE "debugHandler/debug_handler.bin"//! PXA250 JTAG instructions.enum { JTAG_EXTEST=0x00, JTAG_SAMPLE=0x01, JTAG_DBGRX=0x02, JTAG_CLAMP=0x04, JTAG_LDIC=0x07, //< Load Instruction Cache JTAG_HIGHZ=0x08, JTAG_DCSR=0x09, //< Debug Control & Status Register JTAG_DBGTX=0x10, JTAG_IDCODE=0x1E, //JTAG_IDCODE=0x6, <- ugly hack to check Altera's APEX IDCODE. JTAG_BYPASS=0x1F, JTAG_UNSET=0xFF};// Debug Control and Status Register (DCSR)// (see Intel XScale Microarchitecture User's Manual page 9-4)#define DCSR_GE (1<<31)#define DCSR_H (1<<30)#define DCSR_TF (1<<23)#define DCSR_TI (1<<22)#define DCSR_TD (1<<20)#define DCSR_TA (1<<19)#define DCSR_TS (1<<18)#define DCSR_TU (1<<17)#define DCSR_TR (1<<16)#define DCSR_SA (1<<5)#define DCSR_MOE (0x07 <<2)#define DCSR_M (1<<1)#define DCSR_E (1) // Method of entry// (see Intel XScale Microarchitecture User's Manual page 10-3)#define MOE_PROC_RESET (0x0<<2)#define MOE_INSTR_BRK_HIT (0x1<<2)#define MOE_DATA_BRK_HIT (0x2 << 2)#define MOE_BKPT_INSTR_EXEC (0x3 << 2)#define MOE_EXT_DEB_EV (0x4 << 2)#define MOE_VECT_TRAP (0x5 << 2)#define MOE_TRACE_FULL_BRK (0x6 << 2)// TX RX Control Register// (p 10-12)#define TXRX_RR (1<<31) // RX register Ready#define TXRX_OV (1<<30) // Overflow sticky flag#define TXRX_D (1<<29) // High speed download flag#define TXRX_TR (1<<28) // TX Register Ready#include "jtag.h"/*! Used by readTX and writeRX to timeout if the debug handler doesn't handle * the transmition. */#define MAX_RETRY_COUNT 1024//! PXA250 specific JTAG basic controls.class JTAGpxa250 {private: bool doPolling; //! cache current instruction, to gain speed. unsigned char currentIREG; /*! true if the target is currently running the debug handler, ready to * receive commands. */ bool isTargetReady; unsigned int savePlaces[NBR_OF_SAVE_PLACES]; /*! The callback structure, contain a callback function that will be called * each time the target gets ready. * The arg is a pointer passed to the callback function */ typedef struct { void (*callback)(void *); void *arg; } Callback; std::vector<Callback> targetReadyCallback;public: JTAGControl *jtag; JTAGpxa250(JTAGControl *jtag); //! Register a callback function, that will be called each time the target gets ready void registerTargetReadyCallback(void (*func)(void*), void *arg); //! Unregister a callback function, so it won't be called each time the target gets ready void unregisterTargetReadyCallback(void (*func)(void*)); //! Returns true if target is ready to accept new commands bool targetReady() { return isTargetReady; } //! initialize the JTAG connection. //! \return true on success. bool init(int argc, char **argv); //! stop CPU execution, load the debug handler and boot it. //! \return true on success, false on error. bool loadDebugHandler(); //! prints some information on the connected device. //! \return true if a pxa250 is present. bool check(); //! invalidates the mini instruction cache void invalidateMiniIC(); //! invalidate a main cache line void invalidateMainICLine(unsigned int address); //! load a line of 8 instructions of 32 bits each void loadICLine(bool mini, unsigned int address, unsigned int instructions[]); //! reset the CPU, invalidate the cache and put the cpu in hold_rst mode void getReadyForUpload(); //! let the cpu boot by unsetting hold_rst. void boot(); //! Load arbitrary code in the instruction cache bool loadIC(bool mini, unsigned int startAddr, unsigned int instructions[], unsigned int nbInst); //! Put any data into any memory address in the device's address space void putData(unsigned int startAddr, unsigned int words, unsigned int data[], bool halfword = false); //! Put a single word of data into any memory address in the device's address space void putData(unsigned int addr, unsigned int data, bool halfWord = false) { putData(addr, 1, &data, halfWord); } //! Get any data from any memory address in the device's address space void getData(unsigned int startAddr, unsigned int words, unsigned int data[]); //! Execute from memory with a given stack pointer. Obsoleted by continueCmd() void execute(unsigned int startAddr, unsigned int spAddr); //! Cause an external break, enterring a debug exception. void extBreak(); //! reboot the CPU void reboot(); /*! This function polls the TX jtag register. If it's empty, pollForTX returns * immediatly. Otherwise, it reads what the debug handler wants to say, and * do the required processing. */ void pollForTX(); //! send a 'c' command to the debug handler, telling it to resume execution. void continueCmd(); /*! used to write registers. Look in target_to_host.h to know what place contains * which register. * \param place the register to write to * \param value the value to write * \return true on sucess, false if the target is not ready. */ bool setSavePlace(unsigned int place, unsigned int value); /*! Read a register. The result is only meaningfull if the target is ready. * \param place the register to read. See target_to_host.h. * \return the value of the register. */ unsigned int getSavePlace(unsigned int place); //! list of registers of the coprocessor 15. See User's manual, section 10.2 enum Cp15Reg { IBCR0 = 0, IBCR1 = 1, DBR0 = 2, DBR1 = 3, DBCON = 4 }; //! write debug registers. bool setCp15DebugRegister(unsigned int value, Cp15Reg reg); //! Convert an int in host endianness format to little endian. static void intToCharArrayLE(unsigned int src, unsigned char dest[]); //! Convert a little endian char array to a host endian coded int. static int charArrayLEToInt(unsigned char src[]);private: void ireg(unsigned char instr); bool writeRX(unsigned int val); void fastWriteRX(unsigned int val, bool cont); bool readTX(unsigned int *val, int max_retry = MAX_RETRY_COUNT); unsigned int parity(unsigned char data[]); void ldic(); bool readyForTargetCommand(); };//! global variable to access the pxa250.extern JTAGpxa250 *pxa250Ptr;#endif
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