📄 bsp.c
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/*********************************************************************************************************** uC/OS-II* The Real-Time Kernel** (c) Copyright 1992-2003, Micrium, Inc., Weston, FL* All Rights Reserved** Board Support Package**********************************************************************************************************/#include <includes.h>/*********************************************************************************************************** GLOBAL VARIABLES**********************************************************************************************************/static INT8U Disp_Dig1Image; /* Image of both 7-segment LED displays */
static INT8U Disp_Dig2Image;
/*********************************************************************************************************** 7 SEGMENT DISPLAY LOOKUP TABLE** A* -----* | |* F | | B B7 B6 B5 B4 B3 B2 B1 B0* | G |* ----- A B C D E F G * | |* E | | C* | |* -----* D**********************************************************************************************************/static char Disp_7SegTbl[] = { 0xFC, /* '0' */ 0x60, /* '1' */ 0xDA, /* '2' */ 0xF2, /* '3' */ 0x66, /* '4' */ 0xB6, /* '5' */ 0xBE, /* '6' */ 0xE0, /* '7' */ 0xFE, /* '8' */ 0xF6, /* '9' */ 0xEE, /* 'A' */ 0x3E, /* 'b' */ 0x9C, /* 'C' */ 0x7A, /* 'd' */ 0x9E, /* 'E' */ 0x8E /* 'F' */};/*********************************************************************************************************** SEGMENT LOOKUP TABLE** A* -----* | |* F | | B B7 B6 B5 B4 B3 B2 B1 B0* | G |* ----- A B C D E F G Spare * | |* E | | C* | |* -----* D**********************************************************************************************************/static char Disp_IconTbl[] = { 0x80, /* Segment A */ 0x40, /* Segment B */ 0x20, /* Segment C */ 0x10, /* Segment D */ 0x08, /* Segment E */ 0x04, /* Segment F */ 0x02, /* Segment G */ 0x01 /* Spare */};/*********************************************************************************************************** PROTOTYPES**********************************************************************************************************/static void Disp_Init(void);/*********************************************************************************************************** BSP_InitIO()* * Description: Initialize all the I/O devices.** Arguments : None** Returns : None**********************************************************************************************************/void BSP_InitIO (void) {#if OS_CRITICAL_METHOD == 3 /* Allocate storage for CPU status register */
OS_CPU_SR cpu_sr;#endif /* Replace the IRQ jump address with the following: */ /* 0x00000010 IMM High 16-bits of OS_CPU_ISR() */ /* 0x00000014 BRAI Low 16-bits of OS_CPU_ISR() */
OS_ENTER_CRITICAL(); *(INT32U *)0x00000010 = 0xB0000000 | ((INT32U)OS_CPU_ISR >> 16); *(INT32U *)0x00000014 = 0xB8080000 | ((INT32U)OS_CPU_ISR & 0x0000FFFF); OS_EXIT_CRITICAL();
/* Start the interrupt controller */ XIntc_mMasterEnable(XPAR_MYINTC_BASEADDR);
/* Set the number of cycles each timer counts before generating an interrupt */
XTmrCtr_mSetLoadReg(XPAR_MYTIMER1_BASEADDR, 0, 500000);
XTmrCtr_mSetLoadReg(XPAR_MYTIMER2_BASEADDR, 0, 50000000); /* Reset the timers, and clear interrupts */ XTmrCtr_mSetControlStatusReg(XPAR_MYTIMER1_BASEADDR, 0, XTC_CSR_INT_OCCURED_MASK | XTC_CSR_LOAD_MASK); XTmrCtr_mSetControlStatusReg(XPAR_MYTIMER2_BASEADDR, 0, XTC_CSR_INT_OCCURED_MASK | XTC_CSR_LOAD_MASK);
/* Enable timer1 and timer2 interrupts in the interrupt controller */ XIntc_mEnableIntr(XPAR_MYINTC_BASEADDR, XPAR_MYTIMER1_INTERRUPT_MASK | XPAR_MYTIMER2_INTERRUPT_MASK); /* Start the timers */ XTmrCtr_mSetControlStatusReg(XPAR_MYTIMER1_BASEADDR, 0, XTC_CSR_ENABLE_TMR_MASK | XTC_CSR_ENABLE_INT_MASK | XTC_CSR_AUTO_RELOAD_MASK | XTC_CSR_DOWN_COUNT_MASK); XTmrCtr_mSetControlStatusReg(XPAR_MYTIMER2_BASEADDR, 0, XTC_CSR_ENABLE_TMR_MASK | XTC_CSR_ENABLE_INT_MASK | XTC_CSR_AUTO_RELOAD_MASK | XTC_CSR_DOWN_COUNT_MASK);
Disp_Init();}
/*$PAGE*/ /*********************************************************************************************************** Timer ISRs* * Description: A handler function that is called asynchronously by the driver when the Timer/Counter * times out. We take care of the OS timer tick here.* Arguments : baseaddr_p is a pointer to the XTmrCtr driver structure** Returns : None**********************************************************************************************************/void BSP_Timer1Handler (void *baseaddr_p){ int baseaddr; unsigned int csr; baseaddr = *(int *)baseaddr_p; csr = XTmrCtr_mGetControlStatusReg(XPAR_MYTIMER1_BASEADDR, 0); /* Read Timer #1 status */ if (csr & XTC_CSR_INT_OCCURED_MASK) { /* Timer #1 interrupted? */ XTmrCtr_mSetControlStatusReg(XPAR_MYTIMER1_BASEADDR, 0, csr); /* Yes, Clr timer interrupt */
OSTimeTick(); /* Notify uC/OS-II */
}}void BSP_Timer2Handler (void *baseaddr_p){ int baseaddr; unsigned int csr; baseaddr = *(int *)baseaddr_p; csr = XTmrCtr_mGetControlStatusReg(XPAR_MYTIMER2_BASEADDR, 0); /* Read Timer #2 status */ if (csr & XTC_CSR_INT_OCCURED_MASK) { /* Timer #2 interrupted? */ XTmrCtr_mSetControlStatusReg(XPAR_MYTIMER2_BASEADDR, 0, csr); /* Yes, Clr timer interrupt */ } }
/*$PAGE*/ /*********************************************************************************************************** BSP_IntDisAll()* * Description: Disable all interrupts at the interrupt controller.** Arguments : None** Returns : None**********************************************************************************************************/void BSP_IntDisAll (void)
{ XIntc_mMasterDisable(XPAR_MYINTC_BASEADDR);
}/*$PAGE*/ /*********************************************************************************************************** Initialize the two Seven Segment digits* * Description: This function places a '-' on both of the two 7-segment displays.** ------ ------* | | | |* | | | |* ------ ------* | | | |* | | | |* ------ ------** digit # 2 1** * Arguments : None** Returns : None**********************************************************************************************************/static void Disp_Init (void){
XGpio_mSetDataDirection(XPAR_MYGPIO_A_BASEADDR, 0x00); /* Set the direction of the GPIO ports to outputs to drive the 7-seg LEDs */ XGpio_mSetDataDirection(XPAR_MYGPIO_B_BASEADDR, 0x00); Disp_Dig1Image = 0x00; /* Place ' ' on 7-segment display */
Disp_Dig2Image = 0x00;
XGpio_mSetDataReg(XPAR_MYGPIO_A_BASEADDR, Disp_Dig1Image);
XGpio_mSetDataReg(XPAR_MYGPIO_B_BASEADDR, Disp_Dig2Image);}/*$PAGE*/ /*********************************************************************************************************** Display Value on 7-Segment Display* * Description: This function displays a value on one of the two LEDs on the MB1000 board.** ------ ------* | | | |* | | | |* ------ ------* | | | |* | | | |* ------ ------** digit # 2 1** * Arguments : digit Is the LED gigit to write to.* 1 is for the digit on the right* 2 is for the digit on the left** val Is a binary value from 0x00 to 0x0F. val can thus be a hexadecimal value.** Returns : None**********************************************************************************************************/void Disp_7SegVal (INT8U digit, INT8U val){#if OS_CRITICAL_METHOD == 3 /* Allocate storage for CPU status register */ OS_CPU_SR cpu_sr;#endif
switch (digit) { case 1:
OS_ENTER_CRITICAL(); Disp_Dig1Image = Disp_7SegTbl[val];
XGpio_mSetDataReg(XPAR_MYGPIO_A_BASEADDR, Disp_Dig1Image);
OS_EXIT_CRITICAL(); break; case 2:
OS_ENTER_CRITICAL(); Disp_Dig2Image = Disp_7SegTbl[val];
XGpio_mSetDataReg(XPAR_MYGPIO_B_BASEADDR, Disp_Dig2Image); OS_EXIT_CRITICAL(); break; }}/*$PAGE*/ /*********************************************************************************************************** Displays an ICON (i.e. a single segment)* * Description: This function turns ON or OFF one of the segments in the two seven segment digits of the
* MB1000.*
* 7 0 * ------ ------ * 12 | | 8 5 | | 1 * | 13 | | 6 | * ------ ------ * 11 | | 9 4 | | 2 * | | | | * ------ ------ * 10 3
** digit # 2 1** * Arguments : icon Is the desired segment/icon to turn On or Off (see drawing above)** on When TRUE, it turns the Icon ON.
* When FALSE, it turns the Icon OFF.** Returns : None**********************************************************************************************************/void Disp_Icon (INT8U icon, BOOLEAN on){
#if OS_CRITICAL_METHOD == 3 /* Allocate storage for CPU status register */ OS_CPU_SR cpu_sr;#endif INT8U mask;
switch (icon) {
case 0: /* Handle Digit #1's icons */
case 1:
case 2:
case 3:
case 4:
case 5:
case 6:
case 7:
mask = Disp_IconTbl[icon];
OS_ENTER_CRITICAL(); if (on != FALSE) {
Disp_Dig1Image |= mask;
} else {
Disp_Dig1Image &= ~mask;
}
XGpio_mSetDataReg(XPAR_MYGPIO_A_BASEADDR, Disp_Dig1Image);
OS_EXIT_CRITICAL(); break;
case 8: /* Handle Digit #2's icons */
case 9:
case 10:
case 11:
case 12:
case 13:
case 14:
case 15:
mask = Disp_IconTbl[icon - 8];
OS_ENTER_CRITICAL(); if (on != FALSE) {
Disp_Dig2Image |= mask;
} else {
Disp_Dig2Image &= ~mask;
}
XGpio_mSetDataReg(XPAR_MYGPIO_B_BASEADDR, Disp_Dig2Image);
OS_EXIT_CRITICAL(); break;
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