📄 ir.c
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/* Copyright 1998, ESS Technology, Inc. */
/* SCCSID @(#)ir.c 1.53 11/12/03 */
/* Based on VCD version 1.56 5/6/98 */
/*
* This module is used to receive and transmit IR signals.
*
* Transmitting of IR in the current version is interrupt driven (it
* uses timer 1 to keep track of time).
*/
/*
* The current code supports:
* 1) New 3881/3883 style interrupt handling (when DSC_IRQ is defined.)
* 2) Original timer2 style interrupt handling (when DSC_IRQ is not
* defined.)
*
* It also supports 3 styles of R/C: NEC, SANYO and PHILIPS.
*/
#include "common.h"
#include "constvar.h"
#include "dsc.h"
#include "ioport.h"
#include "ir.h"
#include "mvd.h"
#include "timedef.h"
#include "util.h"
#include "power.h"
#include "debug.h"
#ifdef EAUX_IRQ
#include "eaux.h"
#endif
#ifdef NETWORK
#include "wakii.cfg"
#include "enet.h"
extern volatile int C2PO_interrupt;
#endif
#ifdef STREAMING
#define KEY_BUFFER_SIZE 100
int fan_dataIR[100], nKeyStart = 0, nKeyEnd = 0, stopTime=0;
extern int ir_keypressed, netmode;
#endif
#include "sysinfo.h"
#ifdef DVD_MODEM
#include "modem/board.h"
#include "debug.h"
#include "ide.h"
#endif
#if !defined(SF_BASECODE)
#include "const.h"
#endif
#define CPRINTF(a)
extern int IR_table[];
#if defined(SF_BASECODE)
extern unsigned int * IR_syscode;
extern unsigned char * IR_key_tbl;
#endif
#if defined(BD_BAHAMAS) && defined(DVD_MODEM)
/* AUX4: IR; AUX5: 2898irq; EAUX_MODE*/
#define EAUX_IR
#define EAUX_IRQ
#endif
#ifdef IR
/************************************************************************
* Macros relate to remote control
************************************************************************/
#ifdef IR_SANYO
#define IR_SYSCODE 0x0cc0
#endif
#if defined(_KB_VIALTA_) || defined(_KB_VIALTA_02_)
unsigned char code_set = 0;
#endif
#ifdef DSC_IRQ
/* For the new style of IR handling (i.e. via 3881) */
/************************************************************************
* Local variables. *
************************************************************************/
PRIVATE unsigned short dataIR; /* System/customer IR code */
PRIVATE char cntIRbits = 0; /* Number of IR sys/cust. bits */
PRIVATE volatile char stateIR = IR_IDLE; /* IR state machine state */
PRIVATE char trigger_edge;
#ifdef IR_SANYO
PRIVATE unsigned short IR_sanyo_codebar;/* Sanyo IR only */
#endif /* IR_SAYNO */
#ifdef IRREP
PRIVATE unsigned char previous_data; /* Record the previous ID code */
#endif
/************************************************************************
* Local routines *
************************************************************************/
PRIVATE void IR_core_NEC(unsigned int, int);
PRIVATE void IR_core_Philips(unsigned int, int);
void ir_init()
{
CPRINTF(("DSC_ir_init ...\n"));
sysIRcode = IR_syscode[0]; /* Initialize IR system code */
#ifdef DANCER
sysDANCERcode = T_DANCER_syscode[0]; /* Initialize IR system code */
#endif
CLEAR_IRXOR; /* Clear IR XOR (EAUX11 is active high!! */
#ifdef IR_SANYO
IR_sanyo_codebar = (~sysIRcode) & 0x1fff;
#endif /* IR_SANYO */
DSC_INIT_IR(1, DSC_FALLING_EDGE, 1); /* Start 3881 IR */
trigger_edge = 0;
mvd[riface_clear_dbgirq] = 0; /* Clear debug_irq */
enable_int(debug);
}
#if (IR_NEC || IR_SANYO)
PRIVATE void IR_core_NEC(width, overflow)
unsigned int width;
int overflow;
{
#define LEADER_MIN ir_tbl[0]
#define LEADER_MAX ir_tbl[1]
#define DATA_1_MIN ir_tbl[2]
#define DATA_1_MAX ir_tbl[3]
#define DATA_0_MIN ir_tbl[4]
#define DATA_0_MAX ir_tbl[5]
#ifdef IRREP
#define REPEAT_MIN ir_tbl[6]
#define REPEAT_MAX ir_tbl[7]
#endif /* IRREP */
#ifdef DANCER
#define LEADER_DANCER_MIN ir_tbl[IRTBL_INDX_LAST+1]
#define LEADER_DANCER_MAX ir_tbl[IRTBL_INDX_LAST+2]
#define DATA_1_DANCER_MIN ir_tbl[IRTBL_INDX_LAST+3]
#define DATA_1_DANCER_MAX ir_tbl[IRTBL_INDX_LAST+4]
#define DATA_0_DANCER_MIN ir_tbl[IRTBL_INDX_LAST+5]
#define DATA_0_DANCER_MAX ir_tbl[IRTBL_INDX_LAST+6]
#endif
unsigned int *ir_tbl;
unsigned char data;
int reset;
ir_tbl = IR_table;
/*
* If 3881's clock overflows, then reset. The only exception is
* when REP is considered!!
*/
reset = overflow;
if (stateIR == IR_CUSTOM) {
dataIR <<= 1;
if ((width >= DATA_1_MIN) && (width <= DATA_1_MAX)) {
dataIR |= 0x1;
} else if ((width < DATA_0_MIN) || (width > DATA_1_MAX)) {
#ifdef IR_NEC
reset = 1;
#endif /* IR_NEC */
#ifdef IR_SANYO
reset = 1; /* we do not care about repeat key for Sanyo yet */
#endif /* IR_SANYO */
}
cntIRbits++;
#ifdef IR_NEC
/* First 16 bits are syscode */
#if defined(_KB_VIALTA_) || defined(_KB_VIALTA_02_)
if (cntIRbits == 16) {
int k;
for ( k =0; k < T_IR_syscode_SZ >> 2; k ++)
if (dataIR == IR_syscode[k]) break;
if (k == T_IR_syscode_SZ >> 2) reset = 1;
else code_set = k;
}
#else
if ((cntIRbits == 16) && (dataIR != sysIRcode)) reset = 1;
#endif
if (cntIRbits == 24) {
data = dataIR & 0xff;
/* reverse data bits to fit look up table */
mvd[riface_reflect] = data;
data = mvd[riface_reflect];
#ifdef IRREP
previous_data = data;
#endif
codeIR = data | 0x100; /* Indicate a new code */
} else if (cntIRbits == 32) reset = 1;
#endif /* IR_NEC */
#ifdef IR_SANYO
if (cntIRbits == 13) {
dataIR &= 0x1fff;
if (dataIR != sysIRcode) reset = 1;
dataIR = 0;
} else if (cntIRbits == 26) {
unsigned short tmp = (~sysIRcode) & 0x1fff;
if (dataIR != tmp) reset = 1;
dataIR = 0;
} else if (cntIRbits == 34) {
data = dataIR;
mvd[riface_reflect] = data;
data = mvd[riface_reflect];
codeIR = data;
dataIR = 0;
} else if (cntIRbits == 42) {
data = dataIR;
mvd[riface_reflect] = data;
data = ~(mvd[riface_reflect]);
if (data == codeIR) {
codeIR = data | 0x100;
} else codeIR = 0;
reset = 1;
}
#endif /* IR_SANYO */
}
#ifdef DANCER
else if (stateIR == DANCER_CUSTOM)
{
dataIR <<= 1;
if ((width >= DATA_1_DANCER_MIN) && (width <= DATA_1_DANCER_MAX)) {
dataIR |= 0x1;
}
else if ((width < DATA_1_DANCER_MIN) || (width > DATA_0_DANCER_MAX)) {
reset = 1;
}
cntIRbits++;
if ((cntIRbits == 15) && ((dataIR & 0x7f) != sysDANCERcode)) reset = 1;
if (cntIRbits == 16)
{
int i;
int parity;
int one_num = 0;
parity = dataIR & 0x1;
data = dataIR >> 8;
for (i=0;i<8;i++)
{
if ((data & 0x1) == 1)
one_num ++;
data >>= 1;
}
if (!(one_num & 1) && !parity)
reset = 1;
else if ((one_num & 1) && parity)
reset = 1;
else
{
data = dataIR >> 8;
codeIR = data | 0x1100; /* Indicate a new code */
}
} else if (cntIRbits == 17) reset = 1;
}
#endif
else {
if ((width >= LEADER_MIN) && (width <= LEADER_MAX)) {
stateIR = IR_CUSTOM;
dataIR = cntIRbits = 0;
#ifdef DANCER
} else if ((width >= LEADER_DANCER_MIN) &&
(width <= LEADER_DANCER_MAX))
{
stateIR = DANCER_CUSTOM;
dataIR = cntIRbits = 0;
#endif
#ifdef IRREP
} else if ((width >= REPEAT_MIN) && (width <= REPEAT_MAX)) {
/* if the width is 2.25 ms, it is repeat code leader */
if (repeat_IRkey_allowed(previous_data))
codeIR = previous_data | 0x100; /* Indicate a new code */
#endif
} else reset = 1;
}
if (reset) {
/* Reset all, start from the very beginning */
stateIR = IR_IDLE;
}
}
#endif /* IR_NEC || IR_SANYO */
#ifdef IR_PHILIPS
PRIVATE unsigned int data_half = 0; /* Mark whether or nor have half_bit
data before edge of intr. coming*/
PRIVATE void IR_core_Philips(width, overflow)
unsigned int width;
int overflow;
{
unsigned int *ir_tbl;
int reset;
int is_half_bit;
int is_full_bit;
#define HALFBIT_MIN ir_tbl[0]
#define HALFBIT_MAX ir_tbl[1]
#define ONEBIT_MIN ir_tbl[2]
#define ONEBIT_MAX ir_tbl[3]
ir_tbl = IR_table;
reset = overflow; /* If 3881's clock overflows, then reset */
is_half_bit = (width >= HALFBIT_MIN) && (width <= HALFBIT_MAX);
is_full_bit = (width >= ONEBIT_MIN) && (width <= ONEBIT_MAX);
if (stateIR == IR_IDLE) {
/* We shall get a rising edge, since the first bit is fixed */
dataIR = 0;
cntIRbits = 0;
stateIR = IR_CUSTOM;
if (is_half_bit) data_half = 0;
else if (is_full_bit) data_half = 1;
else {
stateIR = IR_IDLE;
}
} else {
if (data_half) {
/*
* We were in half bit position, so this edge shall either
* conclude the previous cycle or go the the half position
* of the next bit. Record the last bit.
*/
dataIR <<= 1;
if (!trigger_edge) dataIR |= 1;
cntIRbits++;
if (is_half_bit) data_half = 0;
else if (!is_full_bit) reset = 1;
} else {
/*
* We started at a sampling cycle, so we shall only get half bit,
* otherwise, something is wrong!
*/
if (is_half_bit) data_half = 1;
else reset = 1;
}
if ((cntIRbits == 12) && trigger_edge && data_half) {
/* This is the last rising edge, no more. So collect the bit */
dataIR <<= 1;
dataIR |= 1;
cntIRbits = 13;
}
if (reset) {
/*
* Abnormal exist. Maybe we are out of sync. If this
* is falling edge, maybe this is the sync of a new
* input!
*/
stateIR = IR_IDLE;
if (trigger_edge) stateIR = IR_LEADER;
} else if (cntIRbits == 13) {
/* We only care the case when system code matches */
if (((dataIR >> 6) & 0x1f) == sysIRcode) {
unsigned int prevctlbit;
prevctlbit = IR_ctlbit;
IR_ctlbit = (dataIR >> 11) & 1;
if ((unsigned int) IR_ctlbit != prevctlbit) {
int tmp = (dataIR >> 12) & 1;
if (tmp) tmp = 0x40;
codeIR = (dataIR & 0x3f) | tmp | 0x100;
IR_rep_cnt = 0;
} else
IR_rep_cnt++;
IR_int_time = (unsigned int) mvd[riface_timer2];
}
stateIR = IR_IDLE;
}
}
}
#endif /* IR_PHILIPS */
/* Interrupt via 3881 */
void IR_recv_interrupt_service(status)
unsigned int status;
{
unsigned int width;
int overflow = 0;
int clear = 0x4;
#ifdef DSC_IRQ_USETIMER2
/* Apparently, timer2 is more tolerant. */
{
unsigned int currIRtime;
static unsigned int prevIRtime;
currIRtime = mvd[riface_timer2];
width = currIRtime - prevIRtime;
if (currIRtime < prevIRtime) { /* Wrap around case */
width += -timer2_period;
}
prevIRtime = currIRtime;
}
#else
if (status & 0x80) {
overflow = 1; /* 3881's clock overflowed */
clear = 0x84; /* Clear the overflow bit */
}
width = DSC_cmd(dsc_ir_diffm, 0) & 0xff; /* Get the counter */
#endif
DSC_cmd(dsc_sys_status, clear); /* Clear 3881's IR int */
mvd[riface_clear_dbgirq] = 0; /* Clear 3210's debug_irq */
#if (IR_NEC || IR_SANYO)
IR_core_NEC(width, overflow);
#endif /* IR_NEC || IR_SAYNO */
#ifdef IR_PHILIPS
if (!trigger_edge)
DSC_INIT_IR(1, DSC_RISING_EDGE, 0); /* detect rising edge */
else
DSC_INIT_IR(1, DSC_FALLING_EDGE, 0); /* detect falling edge */
IR_core_Philips(width, overflow);
trigger_edge = 1-trigger_edge;
#endif /* IR_PHILIPS */
}
#else /* else of DSC_IRQ */
#if defined(EAUX_IR)
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