xram.lst

myson 单片机cs8954 demo code!

C51 COMPILER V7.06   XRAM                                                                  12/22/2004 13:43:46 PAGE 1   


C51 COMPILER V7.06, COMPILATION OF MODULE XRAM
OBJECT MODULE PLACED IN Xram.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE Xram.c BROWSE DEBUG OBJECTEXTEND

stmt level    source

   1          #include "Global.h"
   2          
   3          /*************************************************/
   4          // chip configuration
   5          BYTE xdata  IICCTR  _at_  0xf00;
   6          BYTE xdata  IICSTUS  _at_  0xf01;
   7          BYTE xdata  INTFLG  _at_  0xf03;
   8          BYTE xdata  INTEN  _at_  0xf04;
   9          
  10          BYTE xdata   DDCCTRA1  _at_  0xf06;
  11          BYTE xdata   DDCCTRA2  _at_  0xf86;
  12          
  13          BYTE xdata   SLVA1ADR  _at_  0xf07;
  14          BYTE xdata   SLVA2ADR  _at_  0xf87;
  15          
  16          BYTE xdata   RCB_TXBBUF  _at_  0xf08;
  17          BYTE xdata   SLVBADR  _at_  0xf09;
  18          BYTE xdata   CTRSLVB  _at_  0xf0a;
  19          
  20           BYTE xdata ISPSLV    _at_ 0xF0B; // ISP slave address
  21           BYTE xdata ISPEN   _at_ 0xF0C; // write 0x93H to enable ISP mode
  22          
  23          BYTE xdata   ADC  _at_  0xf10;
  24          
  25          BYTE xdata   WDT  _at_  0xf18;
  26          
  27          BYTE xdata   DA0  _at_  0xf20;
  28          BYTE xdata   DA1  _at_  0xf21;
  29          BYTE xdata   DA2  _at_  0xf22;
  30          BYTE xdata   DA3  _at_  0xf23;
  31          BYTE xdata   DA4  _at_  0xf24;
  32          BYTE xdata   DA5  _at_  0xf25;
  33          
  34          // I/O port
  35          BYTE xdata   Port50  _at_  0xf30;
  36          BYTE xdata   Port51  _at_  0xf31;
  37          BYTE xdata   Port52  _at_  0xf32;
  38          BYTE xdata   Port53  _at_  0xf33;
  39          BYTE xdata   Port54  _at_  0xf34;
  40          BYTE xdata   Port55  _at_  0xf35;
  41          BYTE xdata   Port56  _at_  0xf36;
  42          BYTE xdata   Port57  _at_  0xf37;
  43          
  44          BYTE xdata   Port60  _at_  0xf38;
  45          BYTE xdata   Port61  _at_  0xf39;
  46          BYTE xdata   Port62  _at_  0xf3a;
  47          BYTE xdata   Port63  _at_  0xf3b;
  48          BYTE xdata   Port64  _at_  0xf3c;
  49          BYTE xdata   Port65  _at_  0xf3d;
  50          BYTE xdata   Port66  _at_  0xf3e;
  51          BYTE xdata   Port67  _at_  0xf3f;
  52          
  53          BYTE xdata   Port76  _at_  0xf76;
  54          BYTE xdata   Port77  _at_  0xf77;
  55          
C51 COMPILER V7.06   XRAM                                                                  12/22/2004 13:43:46 PAGE 2   

  56          // onfiguration of of the chip and the funtion of the pins.
  57          BYTE xdata   Padmod0  _at_  0xf50;
  58          BYTE xdata   Padmod1  _at_  0xf51;
  59          BYTE xdata   Padmod2  _at_  0xf52;
  60          BYTE xdata   Padmod3  _at_  0xf53;
  61          BYTE xdata   Padmod4  _at_  0xf54;
  62          BYTE xdata   Padmod5  _at_  0xf55;
  63          BYTE xdata   Padmod6  _at_  0xf5e;
  64          BYTE xdata   Padmod7  _at_  0xf5f;
  65          
  66          BYTE xdata   Option  _at_  0xf56;
  67          
  68          BYTE xdata   ETCTR   _at_   0xf88;
  69          BYTE xdata   ETMODE   _at_  0xf89;
  70          
  71          BYTE xdata   EINT1PEN  _at_  0xf8e;
  72          
  73          /********************************************************************/
  74          
  75          void InitialCPU()
  76          {
  77   1        EA=0;
  78   1        P1=0xff;
  79   1        EA  = 0;            //disable all interrupt
  80   1              
  81   1              IE1 = 0;      // extern interrupt 1 flag
  82   1              EX1 = 1;      // enable   INT1
  83   1      
  84   1              EX0 = 1;
  85   1              IT0 = 1;
  86   1              ET0 = 1;      // enable   TIMER0
  87   1              ES  = 0;
  88   1              PX1 = 1;      // INT1 priority high
  89   1              PT0 = 0;  
  90   1       /// P3=0xff;
  91   1       IT1=0;
  92   1         TMOD=0x51;                                        // Set Timer1=counter , Timer0=timer
  93   1         TR0=1; 
  94   1         IE=0x86;     
  95   1       EA = 1;
  96   1      }
  97          
  98          void Initial_cs8954()
  99          {
 100   1        ADC=0x00;
 101   1        WDT=0x00;
 102   1      
 103   1        DA0=0x00;
 104   1        DA1=0x00;
 105   1        DA2=0x00;
 106   1        DA3=0x00;
 107   1        DA4=0x00;
 108   1        DA5=0x00;
 109   1      
 110   1        Padmod0=0x00;
 111   1        Padmod1=0x3e; /// p50 is da0
 112   1        Padmod2=0xa0;
 113   1        Padmod3=0xfe;
 114   1        Padmod4=0xff;
 115   1        Padmod5=0x00;
 116   1        Padmod6=0x00;
 117   1        Padmod7=0xc0;
C51 COMPILER V7.06   XRAM                                                                  12/22/2004 13:43:46 PAGE 3   

 118   1        
 119   1        Option=0x81; // 94K pwm
 120   1      
 121   1        INTFLG = 0x00;
 122   1      
 123   1        SLVA1ADR = 0x00;
 124   1        SLVA2ADR = 0x00;
 125   1        
 126   1        INTEN = 0xe0 ;
 127   1        //SLVBADR = 0x80|(0xc6>>1);
 128   1        
 129   1      }


MODULE INFORMATION:   STATIC OVERLAYABLE
   CODE SIZE        =    115    ----
   CONSTANT SIZE    =   ----    ----
   XDATA SIZE       =   ----    ----
   PDATA SIZE       =   ----    ----
   DATA SIZE        =   ----    ----
   IDATA SIZE       =   ----    ----
   BIT SIZE         =   ----    ----
END OF MODULE INFORMATION.


C51 COMPILATION COMPLETE.  0 WARNING(S),  0 ERROR(S)