s3c4510b_add.h.bak

来自「ARM7下的UC0S原代码」· BAK 代码 · 共 41 行

//*********************************************************************************************************
//Chinese Academy of Sciences, Institute of Automation
//File Name:	s3c4510b_add.h
//Description: 	Defination of S3c4510B Special Registers
//Author:	JuGuang,Li
//Modefied Date:	2003-4-20
//*********************************************************************************************************	


//*********************************************************************************************************
//IO port special register
//*********************************************************************************************************
#define IOPMOD   		(*(volatile unsigned *)0x03FF5000) //IO port mode register
#define IOPCON		(*(volatile unsigned *)0x03FF5004) //IO port control register
#define IOPDATA		(*(volatile unsigned *)0x03FF5008) //IO port data register

//*********************************************************************************************************
//Serial I/O(UART) special register
//*********************************************************************************************************
#define ULCON0		(*(volatile unsigned *)0x03FFD000) //UART channel0 line control register
#define UCON0		(*(volatile unsigned *)0x03FFD004) //UART channel0 control register
#define USTAT0		(*(volatile unsigned *)0x03FFD008) //UART channel0 status register
#define UTXBUF0		(*(volatile unsigned *)0x03FFD00c) //UART channel0 transimit holding register
#define URXBUF0		(*(volatile unsigned *)0x03FFD010) //UART channel0 recieve buffer register
#define UBRDIV0		(*(volatile unsigned *)0x03FFD014) //Baud rate divisor register0

//*********************************************************************************************************
//Interrupt controller special register
//*********************************************************************************************************
#define INTMOD		(*(volatile unsigned *)0x03FF4000) //Interrupt mode register
#define INTPND		(*(volatile unsigned *)0x03FF4004) //Interrupt pending register
#define INTMSK		(*(volatile unsigned *)0x03FF4008) //Interrupt mask register
#define INTPRI0		(*(volatile unsigned *)0x03FF400c) //Interrupt priority register 0
#define INTPRI1		(*(volatile unsigned *)0x03FF4010) //Interrupt priority register 1
#define INTPRI2		(*(volatile unsigned *)0x03FF4014) //Interrupt priority register 2
#define INTPRI3		(*(volatile unsigned *)0x03FF4018) //Interrupt priority register 3
#define INTPRI4		(*(volatile unsigned *)0x03FF401c) //Interrupt priority register 4
#define INTPRI5		(*(volatile unsigned *)0x03FF4020) //Interrupt priority register 5
#define INTOFFSET		(*(volatile unsigned *)0x03FF4024) //Interrupt offset address register
#define INTOSET_FIQ	(*(volatile unsigned *)0x03FF4030) //FIQ Interrupt offset register
#define INTOSET_IRQ	(*(volatile unsigned *)0x03FF4034) //IRQ Interrupt offset register