init.s

一个ARM7的定时器程序,程序员通过该程序可以了解ARM7的编程方法,启动过程,地址映射等基本概念和实现方法

;
; This module performs ROM/RAM remapping (if required), initializes stack 
; pointers and interrupts for each mode, and finally branches to __main in 
; the C library (which eventually calls main()).
;
; On reset, the ARM core starts up in Supervisor (SVC) mode, in ARM state, 
; with IRQ and FIQ disabled.


; --- Standard definitions of mode bits and interrupt (I & F) flags in PSRs
DEBUG	EQU	1

		AREA	Init, CODE, READONLY
		CODE32
		GET snds.s
		ENTRY
start		
		B		Reset_Handler
		B		.;Undefined_Handler
		B		.;SWI_Handler
		B		.;Prefetch_Handler
		B		.;Abort_Handler
		NOP		; Reserved vector
		B		IRQ_Handler
		B		.;FIQ_Handler




;disable interrupts in CPU and switch to SVC32 mode
Reset_Handler

	LDR	r2, =ARM7_INTMASK			 ;R2->interrupt controller
	MVN	r1, #0						 ;&FFFFFFFF
	STR	r1, [r2]					 ;disable all interrupt soucres

	LDR	r2, =ARM7_INTPEND			 ;R2->interrupt pend register.
	MVN	r1, #0						 ;&FFFFFFFF
	STR	r1, [r2]					 ;clear all interrupt flags.

	LDR	r0, =ARM7_SYSCFG
	LDR	r1, =rSYSCFG				;config SYSCFG
	STR	r1, [r0] 					;Cache & WB disabled
	
;=====================================
; Initialise STACK 
;=====================================
INITIALIZE_STACK
	MRS	r0, cpsr
	BIC	r0, r0, #LOCKOUT | Mode_SYS
	ORR	r2, r0, #Mode_USR	

	ORR	r1, r0, #LOCKOUT | Mode_FIQ
	MSR	cpsr_cf, r1
	MSR	spsr_cf, r2 
	LDR	sp, =FIQ_STACK

	ORR	r1, r0, #LOCKOUT | Mode_IRQ
;	BIC	r1, r1, #I_BIT
	MSR	cpsr_cf, r1
	MSR	spsr_cf, r2
	LDR	sp, =IRQ_STACK

	ORR	r1, r0, #LOCKOUT | Mode_ABT
	MSR	cpsr_cf, r1
	MSR	spsr_cf, r2
	LDR	sp, =ABT_STACK

	ORR	r1, r0, #LOCKOUT | Mode_UND
	MSR	cpsr_cf, r1
	MSR	spsr_cf, r2
	LDR	sp, =UDF_STACK
	
	

	ORR	r1, r0, #LOCKOUT | Mode_SVC
	MSR	cpsr_cf, r1
	MSR	spsr_cf, r2
	LDR	sp, =SVC_STACK   ; Change CPSR to SVC mode



;	LDR	r2, =ARM7_INTMASK			 ;R2->interrupt controller
;	MVN	r1, #0						 ;&FFFFFFFF
;	STR	r1, [r2]					 ;disable all interrupt soucres

;	LDR	r2, =ARM7_INTPEND			 ;R2->interrupt pend register.
;	MVN	r1, #0						 ;&FFFFFFFF
;	STR	r1, [r2]					 ;clear all interrupt flags.

;	LDR	r0, =ARM7_SYSCFG
;	LDR	r1, =rSYSCFG				;config SYSCFG
;	STR	r1, [r0] 					;Cache & WB disabled
	
	
	IF :DEF:DEBUG
	B	prog_start
	ELSE
	
	LDR r0, =ARM7_IOPMOD
	MOV r1, #0xFFFFFFFF
	STR r1, [r0]
	LDR r0, =ARM7_IOPDATA
	MOV r1, #0x0
	STR r1, [r0]
	
;Initalize the memory as follow:
;	FLASH			@ 0  ~ 2 M
;	SDRAM			@ 16 ~ 24M
	LDR	r1, =rEXTDBWTH 				;EXTDBWTH          		
	LDR	r2, =rROMCON0  				;ROMCON0	@ 0M ~ 2M	
	LDR	r3, =rROMCON1				;ROMCON1	@ DISABLED
	LDR	r4, =rROMCON2				;ROMCON1	@ DISABLED
	LDR	r5, =rROMCON3				;ROMCON1	@ DISABLED
	LDR	r6, =rROMCON4				;ROMCON1	@ DISABLED
	LDR	r7, =rROMCON5				;ROMCON1	@ DISABLED
	LDR	r8, =rSDRAMCON0				;SDRAMCON0 	@ 16M ~ 24M
	LDR	r9, =rSDRAMCON1				;SDRAMCON1 	@ DISABLED
	LDR	r10,=rSDRAMCON2				;SDRAMCON2 	@ DISABLED
	LDR	r11,=rSDRAMCON3				;SDRAMCON3 	@ DISABLED
	LDR	r12,=rSREFEXTCON			
	LDR	r0, =ARM7_EXTDBWTH 			
	STMIA	r0, {r1-r12}
	
;***Self copy from FLASH to SDRAM*** 

    IMPORT |Image$$RO$$Base|    
	IMPORT |Image$$RO$$Limit|   
	IMPORT |Image$$RW$$Base|   
	IMPORT |Image$$RW$$Limit| 	
	IMPORT |Image$$ZI$$Base| 	
	IMPORT |Image$$ZI$$Limit| 
	LDR		r0, =|Image$$RO$$Base|      
	LDR		r1, =|Image$$RO$$Limit|      
	LDR		r2, =|Image$$RW$$Base|      
	LDR		r3, =|Image$$RW$$Limit|     
	SUB		r1, r1, r0
	SUB		r3, r3, r2
	ADD		r1, r1, r3
	LDR		r2, =0x01000000   ;@16M
COPY
	LDR		r3, [r0], #4
	STR		r3, [r2], #4
	SUBS	r1, r1,   #4
	BNE		COPY
;***Remap the memory***
; 	FLASH	@ 16 ~ 18M 
; 	SDRAM	@ 0  ~ 8M
	LDR	r1, =rEXTDBWTH_R 			;EXTDBWTH          		
	LDR	r2, =rROMCON0_R  			;ROMCON0	@ 16M ~ 18M	
	LDR	r3, =rROMCON1_R				;ROMCON1	@ DISABLED
	LDR	r4, =rROMCON2_R				;ROMCON2	@ DISABLED
	LDR	r5, =rROMCON3_R				;ROMCON3	@ DISABLED
	LDR	r6, =rROMCON4_R				;ROMCON4	@ DISABLED
	LDR	r7, =rROMCON5_R				;ROMCON4	@ DISABLED
	LDR	r8, =rSDRAMCON0_R			;SDRAMCON0 	@ 0M ~ 8M
	LDR	r9, =rSDRAMCON1_R			;SDRAMCON1 	@ DISABLED
	LDR	r10,=rSDRAMCON2_R			;SDRAMCON2 	@ DISABLED
	LDR	r11,=rSDRAMCON3_R			;SDRAMCON3 	@ DISABLED
	LDR	r12,=rSREFEXTCON_R			
	LDR	r0, =ARM7_EXTDBWTH 			
	STMIA	r0, {r1-r12}

;***Copy RW & ZI to SDRAM***

	LDR r0, =|Image$$RO$$Limit| 	
	LDR r1, =|Image$$RW$$Base| 		
	LDR r3, =|Image$$ZI$$Base| 		

	CMP r0, r1 
	BEQ %1
 
0 	CMP r1, r3 						; Copy init data
	LDRCC r2, [r0], #4
	STRCC r2, [r1], #4
	BCC %0

1 	LDR r1, =|Image$$ZI$$Limit| 	; Top of zero init segment
	MOV r2, #0

2 	CMP r3, r1 						; Zero init
	STRCC r2, [r3], #4
	BCC %2
	
	LDR r0, =ARM7_IOPDATA
	MOV r1, #0xFFFFFFFF
	STR r1, [r0]
	B	prog_start
	ENDIF
	
prog_start
	IMPORT  C_ENTRY
	MRS	r0, cpsr
	BIC	r0, r0, #MASK_MODE
	ORR	r0, r0, #Mode_USR
	ORR r0, r0, #F_BIT
	MSR	cpsr_c, r0
	LDR	sp, =USR_STACK
	
	LDR r0, =ARM7_IOPMOD
	MOV r1, #0xFFFFFFFF
	STR r1, [r0]
	LDR r0, =ARM7_IOPDATA
	MOV r1, #0x0
	STR r1, [r0]
	
	LDR	pc, =C_ENTRY       ;跳到C代码入口.	
	
	
	
IRQ_Handler
	IMPORT  C_IRQ_Handler


	STMFD	sp!, {r0-r12, lr}
	BL		C_IRQ_Handler
	LDMFD	sp!, {r0-r12, lr}
	SUBS	pc, lr, #4
	
	
	END