mptable.equ

AMI 主板的BIOS源码。

;*****************************************************************;
;*****************************************************************;
;**                                                             **;
;**      (C)Copyright 1985-1996, American Megatrends, Inc.      **;
;**                                                             **;
;**                     All Rights Reserved.                    **;
;**                                                             **;
;**           6145-F Northbelt Pkwy, Norcross, GA 30071         **;
;**                                                             **;
;**                     Phone [phone]                    **;
;**                                                             **;
;*****************************************************************;
;*****************************************************************;
; 
;*****************************************************************;
;
;	MPTABLE.EQU
;
;	This file contains various equate declarations needed for 
;	creating MultiProcessing table entries.
;
;*****************************************************************;


PCMP_SIGNATURE			textequ		<"PCMP">
PCMP_SIGNATURE_DWORD		textequ		<"PMCP">	; for lodsd/stosd operations 

MP_SPEC_REVISION		equ	01h


PROCESSOR_ENTRY_TYPE		equ	0
BUS_ENTRY_TYPE			equ	1
IO_APIC_ENTRY_TYPE		equ	2
INTERRUPT_ENTRY_TYPE		equ	3
LOCAL_INTR_ENTRY_TYPE		equ	4


;
;	CPU related equates
;

DEFAULT_LOCAL_APIC_ADDRESS	equ	0FEE00000h 


; CPU Flags
CPU_ENBLD       		equ     01h		; CPU is enabled
BSP_CPU         		equ     02h		; CPU is Bootstrap processor

; CPU Signature as per CPUID
Family_486      		equ     0421h		; Generic 486
Family_586      		equ     0500h		; Generic 586

Model_P54C      		equ     20h
B1_CPU          		equ     01h
B3_CPU          		equ     02h
B5_CPU          		equ     04h
C2_CPU          		equ     05h

; CPU feature flags as per CPUID
FPU             		equ     0001h		; On-chip FPU
VME				equ	0002h		; Virtual 8086 mode enhancements
DE				equ	0004h		; Debugging extensions
PSE				equ	0008h		; Page size extensions (4M pages)
TSC				equ	0010h		; Time stamp counter
MSR				equ	0020h		; Model specific registers
PAE				equ	0040h		; Physical address extension (addressing > 32 bits)
MCE				equ	0080h		; Machine check exception
CX8             		equ     0100h		; Compare and Exchange 8 bytes
LOCAL_APIC_ON_CPU      		equ     0200h		; On chip local APIC
MTRR				equ	1000h		; Memory type range registers
PGE				equ	2000h		; PTE global bit
MCA				equ	4000h		; Machine check architecture
CMOV_SUPPORT			equ	8000h		; Condional move instruction

INTEGRATED_APIC_VERSION 	equ     11h		; Integrated APIC version 1x

; Default CPU conditions

DEFAULT_NUMBER_OF_PROCESSORS	equ	2
DEFAULT_CPU_SIGNATURE		equ	(Family_586 OR Model_P54C OR B1_CPU) 
DEFAULT_CPU_FEATURES		equ	(FPU OR LOCAL_APIC_ON_CPU OR CX8)

;
;	Bus definition related equates
;

EISA_BUS                textequ         <"EISA  ">              ; EISA Bus
ISA_BUS                 textequ         <"ISA   ">              ; ISA Bus
PCI_BUS                 textequ         <"PCI   ">              ; PCI Bus
MCA_BUS                 textequ         <"MCA   ">              ; MCA Bus
PCMCIA_BUS              textequ         <"PCMCIA">              ; PCMCIA Bus
VL_BUS                  textequ         <"VL    ">              ; VESA Local Bus
NU_BUS                  textequ         <"NUBUS ">              ; Apple MAC NuBus
VME_BUS                 textequ         <"VME   ">              ; VME Bus
COROLLARY_BUS           textequ         <"CBUS  ">              ; Corollary Bus
COROLLARY_BUS_II        textequ         <"CBUSII">              ; Corollary Bus II
MULTI_BUS_I             textequ         <"MBI   ">              ; Multibus I
MULTI_BUS_II            textequ         <"MBII  ">              ; Multibus II
MPI_BUS                 textequ         <"MPI   ">              ; MPI Bus
MPSA_BUS                textequ         <"MPSA  ">              ; MPSA Bus
EXPRESS_BUS             textequ         <"XPRESS">              ; Express System Bus
FUTURE_BUS              textequ         <"FUTURE">              ; IEEE FutureBus
VME_BUS                 textequ         <"VME   ">              ; VME Bus
INTERNAL_BUS            textequ         <"INTERN">              ; Internal Bus
TURBO_CHANNEL_BUS       textequ         <"TC    ">              ; DEC Turbo Channel

;
;	I/O APIC related equates
;

IO_APIC_ENBLD   		equ     01h
DEFAULT_IO_APIC_ID		equ	02h
DEFAULT_IO_APIC_BASE_ADDRESS 	equ	0FEC00000h 
ALL_IO_APICS			equ	0FFh

IO_APIC_REGISTER_SELECT		equ	0000h
IO_APIC_REGISTER_WINDOW		equ	0010h

IO_APIC_ID_REGISTER		equ	00h
IO_APIC_VERSION_REGISTER	equ	01h

;
;	Interrupt related entries
;

INTR_TYPE       	equ     00h
NMI_TYPE        	equ     01h
SMI_TYPE        	equ     02h
EXTINT_TYPE     	equ     03h

BUS_DEFAULT_POLARITY    equ     00h
BUS_ACTIVE_HIGH         equ     01h
BUS_ACTIVE_LOW          equ     03h

BUS_DEFAULT_TRIGGER     equ     00h
BUS_EDGE_TRIGGER        equ     04h
BUS_LEVEL_TRIGGER       equ     0Ch

;
;	Local APIC related entries
;

ALL_LOCAL_APICS		equ	0FFh

LOCAL_APIC_ID		equ	0020h		; Local APIC ID
LOCAL_APIC_VER		equ	0030h		; APIC version

LOCAL_APIC_ENABLED	equ	000000100h	; Local APIC enabled bit in SVR

LOCAL_APIC_TPR		equ	0080h		; Task Priority Register
LOCAL_APIC_APR		equ	0090h		; Arbitration Priority Register
LOCAL_APIC_PPR		equ	00A0h		; Processor Priority Register
LOCAL_APIC_EOI		equ	00B0h		; EOI Register
LOCAL_APIC_RRR		equ	00C0h		; Remote Read Register
LOCAL_APIC_LDR		equ	00D0h		; Logical Destination Register
LOCAL_APIC_DFR		equ	00E0h		; Destination Format Register
LOCAL_APIC_SVR		equ	00F0h		; Spurious Vector Register

LOCAL_APIC_ISR_BASE	equ	0100h		; ISR 0-255
LOCAL_APIC_TMR_BASE	equ	0180h		; TMR 0-255
LOCAL_APIC_IRR_BASE	equ	0200h		; IRR 0-255

LOCAL_APIC_ESR		equ	0280h		; Error status register

LOCAL_APIC_ICR_LOW	equ	0300h		; Interrupt Command Register 0-31
LOCAL_APIC_ICR_HIGH	equ	0310h		; Interrupt Command Register 32-63

LOCAL_APIC_LVT0		equ	0320h		; LVT0 (timer)
LOCAL_APIC_TIMER	equ	0320h		; LVT0 (timer)

LOCAL_APIC_LVT1		equ	0350h		; LVT1 (LINT0)
LOCAL_APIC_LINT0	equ	0350h		; LVT1 (LINT0)

LOCAL_APIC_LVT2		equ	0360h		; LVT2 (LINT1)
LOCAL_APIC_LINT1	equ	0360h		; LVT2 (LINT1)

LOCAL_APIC_LVT3		equ	0370h		; LVT3 (Error)
LOCAL_APIC_ERROR	equ	0370h		; LVT3 (Error)

LOCAL_APIC_TIMER_IC	equ	0380h		; Initial count for timer
LOCAL_APIC_TIMER_CC	equ	0390h		; Current count for timer
LOCAL_APIC_TIMER_DC	equ	03E0h		; Timer divide configuration register

ICR_HIGH_RESERVED	equ	000ffffffh 	; Reserved bits in ICR HIGH
ICR_LOW_RESERVED	equ	0fff02000h 	; Resrved bits in ICR LOW

; Interrupt delivery modes
INT_DELIVER_FIXED		equ	000b		; Fixed
INT_DELIVER_LOWEST_PRIORITY	equ	001b		; Lowest priority
INT_DELIVER_SMI			equ	010b		; SMI
INT_DELIVER_REMOTE_READ		equ	011b		; Remote read
INT_DELIVER_NMI			equ	100b		; NMI
INT_DELIVER_INIT        	equ	101b		; INIT
INT_DELIVER_START_UP        	equ	110b		; Start Up
INT_DELIVER_EXTINT		equ	111b		; ExtInt

LOCAL_APIC_INTR_MASK_BIT	equ	000010000h	; APIC mask interrupt

; Destination shorthand
DESTINATION_FIELD		equ	00b		; Use destination field
DESTINATION_SELF		equ	01b		; Send to self
DESTINATION_ALL_INCL_SELF	equ	10b		; Send to all including self
DESTINATION_ALL_EXCL_SELF	equ	11b		; Send to all excluding self

REMOTE_READ_STATUS_FIELD	equ	0300h		; Remote read status
REMOTE_READ_ERROR		equ	00b		; Error on remote read
REMOTE_READ_IN_PROGRESS		equ	01b		; Remote read in progress
REMOTE_READ_VALID		equ	11b		; Remote read valid

APIC_IPI_RETRY_COUNT		equ	10		; Try an IPI ten times
REMOTE_READ_RETRY_COUNT		equ	10		; Try remote read ten times


; ESR (Error status register)  bit definitions

SEND_CS_ERROR			equ	000000001h	; Send checksum error
RECEIVE_CS_ERROR		equ	000000002h	; Receive checksum error