rlc

FDTD 可以用来创建mpeg

// example of RLC circuit
// L and R comes from wires

dx 0.2e-6
time 1e-6
Nx 50
Ny 55
Nz 25

matlaboutput

//   x1 x2 y1 y2 z1 z2 sig r_eps
box  10 40 10 14 10 14 1e6  1
box  10 40 40 44 10 14 1e6  1

box  10 14 10 23 10 14 1e6  1
box  10 14 31 44 10 14 1e6  1

box  36 40 10 21 10 14 1e6  1
box  36 40 33 44 10 14 1e6  1

box  34 42 22 24 10 14 1e6  1
box  34 42 30 32 10 14 1e6  1


//      x1 x2 y1 y2 z1 z2 V D ramp   stay   Ri
voltage 12 12 24 30 12 12 1 y 1e-15 1e-11  1e-4

show_V  38 38 12 42 12 12  20
show_Component  Ey  z 12   20
show_J z 12 20

//movie 1 -5e5 15e5 10  Movie1.mpg l