at91m55800a.rdf

eb55评估板例程 for ads

# ----------------------------------------------------------------------------
#          ATMEL Microcontroller Software Support  -  ROUSSET  -
# ----------------------------------------------------------------------------
#  The software is delivered "AS IS" without warranty or condition of any
#  kind, either express, implied or statutory. This includes without
#  limitation any warranty or condition with respect to merchantability or
#  fitness for any particular purpose, or against the infringements of
#  intellectual property rights of others.
# ----------------------------------------------------------------------------
# File Name           : AT91M55800A.h
# Object              : AT91M55800A definitions
# Generated           : AT91 SW Application Group  07/01/2003 (17:21:53)
# 
# CVS Reference       : /AT91M55800A.pl/1.18/Thu Nov 21 12:37:56 2002//
# CVS Reference       : /AIC_1246F.pl/1.4/Mon Nov 04 16:50:58 2002//
# CVS Reference       : /WD_1241B.pl/1.1/Mon Nov 04 16:51:00 2002//
# CVS Reference       : /APMC_55800A.pl/1.1/Thu Nov 21 12:37:30 2002//
# CVS Reference       : /RTC_1366C.pl/1.2/Mon Nov 04 16:50:58 2002//
# CVS Reference       : /PIO_1321C.pl/1.5/Tue Oct 29 14:50:24 2002//
# CVS Reference       : /TC_1243B.pl/1.4/Tue Nov 05 11:43:10 2002//
# CVS Reference       : /PDC_1363D.pl/1.3/Wed Oct 23 13:49:46 2002//
# CVS Reference       : /US_1242E.pl/1.5/Thu Nov 21 12:37:56 2002//
# CVS Reference       : /SPI_1244C.pl/1.5/Tue Nov 05 16:13:46 2002//
# CVS Reference       : /ADC_55800A.pl/1.3/Tue Nov 05 16:02:02 2002//
# CVS Reference       : /DAC_55800A.pl/1.1/Tue Nov 05 11:43:10 2002//
# CVS Reference       : /SF_M55800A.pl/1.1/Tue Nov 05 14:45:40 2002//
# CVS Reference       : /EBI_55800A.pl/1.3/Wed Feb 19 08:25:20 2003//
# ----------------------------------------------------------------------------

rdf.version=1

~sysinclude=arm_default.rdf
~sysinclude=arm_banked.rdf
# ========== Register definition for AIC peripheral ========== 
AT91C_AIC_EOICR.name="AT91C_AIC_EOICR"
AT91C_AIC_EOICR.description="End of Interrupt Command Register"
AT91C_AIC_EOICR.helpkey="End of Interrupt Command Register"
AT91C_AIC_EOICR.access=memorymapped
AT91C_AIC_EOICR.address=0xFFFFF130
AT91C_AIC_EOICR.width=32
AT91C_AIC_EOICR.byteEndian=little
AT91C_AIC_EOICR.type=enum
AT91C_AIC_EOICR.enum.0.name=*** Write only ***
AT91C_AIC_EOICR.enum.1.name=Error
AT91C_AIC_ICCR.name="AT91C_AIC_ICCR"
AT91C_AIC_ICCR.description="Interrupt Clear Command Register"
AT91C_AIC_ICCR.helpkey="Interrupt Clear Command Register"
AT91C_AIC_ICCR.access=memorymapped
AT91C_AIC_ICCR.address=0xFFFFF128
AT91C_AIC_ICCR.width=32
AT91C_AIC_ICCR.byteEndian=little
AT91C_AIC_ICCR.type=enum
AT91C_AIC_ICCR.enum.0.name=*** Write only ***
AT91C_AIC_ICCR.enum.1.name=Error
AT91C_AIC_IECR.name="AT91C_AIC_IECR"
AT91C_AIC_IECR.description="Interrupt Enable Command Register"
AT91C_AIC_IECR.helpkey="Interrupt Enable Command Register"
AT91C_AIC_IECR.access=memorymapped
AT91C_AIC_IECR.address=0xFFFFF120
AT91C_AIC_IECR.width=32
AT91C_AIC_IECR.byteEndian=little
AT91C_AIC_IECR.type=enum
AT91C_AIC_IECR.enum.0.name=*** Write only ***
AT91C_AIC_IECR.enum.1.name=Error
AT91C_AIC_SVR.name="AT91C_AIC_SVR"
AT91C_AIC_SVR.description="Source Vector egister"
AT91C_AIC_SVR.helpkey="Source Vector egister"
AT91C_AIC_SVR.access=memorymapped
AT91C_AIC_SVR.address=0xFFFFF080
AT91C_AIC_SVR.width=32
AT91C_AIC_SVR.byteEndian=little
AT91C_AIC_SMR.name="AT91C_AIC_SMR"
AT91C_AIC_SMR.description="Source Mode egister"
AT91C_AIC_SMR.helpkey="Source Mode egister"
AT91C_AIC_SMR.access=memorymapped
AT91C_AIC_SMR.address=0xFFFFF000
AT91C_AIC_SMR.width=32
AT91C_AIC_SMR.byteEndian=little
AT91C_AIC_SPU.name="AT91C_AIC_SPU"
AT91C_AIC_SPU.description="Spurious Vector Register"
AT91C_AIC_SPU.helpkey="Spurious Vector Register"
AT91C_AIC_SPU.access=memorymapped
AT91C_AIC_SPU.address=0xFFFFF134
AT91C_AIC_SPU.width=32
AT91C_AIC_SPU.byteEndian=little
AT91C_AIC_FVR.name="AT91C_AIC_FVR"
AT91C_AIC_FVR.description="FIQ Vector Register"
AT91C_AIC_FVR.helpkey="FIQ Vector Register"
AT91C_AIC_FVR.access=memorymapped
AT91C_AIC_FVR.address=0xFFFFF104
AT91C_AIC_FVR.width=32
AT91C_AIC_FVR.byteEndian=little
AT91C_AIC_FVR.permission.write=none
AT91C_AIC_IVR.name="AT91C_AIC_IVR"
AT91C_AIC_IVR.description="IRQ Vector Register"
AT91C_AIC_IVR.helpkey="IRQ Vector Register"
AT91C_AIC_IVR.access=memorymapped
AT91C_AIC_IVR.address=0xFFFFF100
AT91C_AIC_IVR.width=32
AT91C_AIC_IVR.byteEndian=little
AT91C_AIC_IVR.permission.write=none
AT91C_AIC_ISR.name="AT91C_AIC_ISR"
AT91C_AIC_ISR.description="Interrupt Status Register"
AT91C_AIC_ISR.helpkey="Interrupt Status Register"
AT91C_AIC_ISR.access=memorymapped
AT91C_AIC_ISR.address=0xFFFFF108
AT91C_AIC_ISR.width=32
AT91C_AIC_ISR.byteEndian=little
AT91C_AIC_ISR.permission.write=none
AT91C_AIC_IMR.name="AT91C_AIC_IMR"
AT91C_AIC_IMR.description="Interrupt Mask Register"
AT91C_AIC_IMR.helpkey="Interrupt Mask Register"
AT91C_AIC_IMR.access=memorymapped
AT91C_AIC_IMR.address=0xFFFFF110
AT91C_AIC_IMR.width=32
AT91C_AIC_IMR.byteEndian=little
AT91C_AIC_IMR.permission.write=none
AT91C_AIC_ISCR.name="AT91C_AIC_ISCR"
AT91C_AIC_ISCR.description="Interrupt Set Command Register"
AT91C_AIC_ISCR.helpkey="Interrupt Set Command Register"
AT91C_AIC_ISCR.access=memorymapped
AT91C_AIC_ISCR.address=0xFFFFF12C
AT91C_AIC_ISCR.width=32
AT91C_AIC_ISCR.byteEndian=little
AT91C_AIC_ISCR.type=enum
AT91C_AIC_ISCR.enum.0.name=*** Write only ***
AT91C_AIC_ISCR.enum.1.name=Error
AT91C_AIC_IPR.name="AT91C_AIC_IPR"
AT91C_AIC_IPR.description="Interrupt Pending Register"
AT91C_AIC_IPR.helpkey="Interrupt Pending Register"
AT91C_AIC_IPR.access=memorymapped
AT91C_AIC_IPR.address=0xFFFFF10C
AT91C_AIC_IPR.width=32
AT91C_AIC_IPR.byteEndian=little
AT91C_AIC_IPR.permission.write=none
AT91C_AIC_CISR.name="AT91C_AIC_CISR"
AT91C_AIC_CISR.description="Core Interrupt Status Register"
AT91C_AIC_CISR.helpkey="Core Interrupt Status Register"
AT91C_AIC_CISR.access=memorymapped
AT91C_AIC_CISR.address=0xFFFFF114
AT91C_AIC_CISR.width=32
AT91C_AIC_CISR.byteEndian=little
AT91C_AIC_CISR.permission.write=none
AT91C_AIC_IDCR.name="AT91C_AIC_IDCR"
AT91C_AIC_IDCR.description="Interrupt Disable Command egister"
AT91C_AIC_IDCR.helpkey="Interrupt Disable Command egister"
AT91C_AIC_IDCR.access=memorymapped
AT91C_AIC_IDCR.address=0xFFFFF124
AT91C_AIC_IDCR.width=32
AT91C_AIC_IDCR.byteEndian=little
AT91C_AIC_IDCR.type=enum
AT91C_AIC_IDCR.enum.0.name=*** Write only ***
AT91C_AIC_IDCR.enum.1.name=Error
# ========== Register definition for WD peripheral ========== 
AT91C_WD_SR.name="AT91C_WD_SR"
AT91C_WD_SR.description="Status Register"
AT91C_WD_SR.helpkey="Status Register"
AT91C_WD_SR.access=memorymapped
AT91C_WD_SR.address=0xFFFF800C
AT91C_WD_SR.width=32
AT91C_WD_SR.byteEndian=little
AT91C_WD_SR.permission.write=none
AT91C_WD_CMR.name="AT91C_WD_CMR"
AT91C_WD_CMR.description="Clock Mode Register"
AT91C_WD_CMR.helpkey="Clock Mode Register"
AT91C_WD_CMR.access=memorymapped
AT91C_WD_CMR.address=0xFFFF8004
AT91C_WD_CMR.width=32
AT91C_WD_CMR.byteEndian=little
AT91C_WD_CR.name="AT91C_WD_CR"
AT91C_WD_CR.description="Control Register"
AT91C_WD_CR.helpkey="Control Register"
AT91C_WD_CR.access=memorymapped
AT91C_WD_CR.address=0xFFFF8008
AT91C_WD_CR.width=32
AT91C_WD_CR.byteEndian=little
AT91C_WD_CR.type=enum
AT91C_WD_CR.enum.0.name=*** Write only ***
AT91C_WD_CR.enum.1.name=Error
AT91C_WD_OMR.name="AT91C_WD_OMR"
AT91C_WD_OMR.description="Overflow Mode Register"
AT91C_WD_OMR.helpkey="Overflow Mode Register"
AT91C_WD_OMR.access=memorymapped
AT91C_WD_OMR.address=0xFFFF8000
AT91C_WD_OMR.width=32
AT91C_WD_OMR.byteEndian=little
# ========== Register definition for APMC peripheral ========== 
AT91C_APMC_SR.name="AT91C_APMC_SR"
AT91C_APMC_SR.description="Status Register"
AT91C_APMC_SR.helpkey="Status Register"
AT91C_APMC_SR.access=memorymapped
AT91C_APMC_SR.address=0xFFFF4030
AT91C_APMC_SR.width=32
AT91C_APMC_SR.byteEndian=little
AT91C_APMC_SR.permission.write=none
AT91C_APMC_PCR.name="AT91C_APMC_PCR"
AT91C_APMC_PCR.description="Power Control Register"
AT91C_APMC_PCR.helpkey="Power Control Register"
AT91C_APMC_PCR.access=memorymapped
AT91C_APMC_PCR.address=0xFFFF4028
AT91C_APMC_PCR.width=32
AT91C_APMC_PCR.byteEndian=little
AT91C_APMC_CGMR.name="AT91C_APMC_CGMR"
AT91C_APMC_CGMR.description="Clock Generator Mode Register"
AT91C_APMC_CGMR.helpkey="Clock Generator Mode Register"
AT91C_APMC_CGMR.access=memorymapped
AT91C_APMC_CGMR.address=0xFFFF4020
AT91C_APMC_CGMR.width=32
AT91C_APMC_CGMR.byteEndian=little
AT91C_APMC_PCSR.name="AT91C_APMC_PCSR"
AT91C_APMC_PCSR.description="Peripheral Clock Status Register"
AT91C_APMC_PCSR.helpkey="Peripheral Clock Status Register"
AT91C_APMC_PCSR.access=memorymapped
AT91C_APMC_PCSR.address=0xFFFF4018
AT91C_APMC_PCSR.width=32
AT91C_APMC_PCSR.byteEndian=little
AT91C_APMC_PCSR.permission.write=none
AT91C_APMC_IMR.name="AT91C_APMC_IMR"
AT91C_APMC_IMR.description="Interrupt Mask Register"
AT91C_APMC_IMR.helpkey="Interrupt Mask Register"
AT91C_APMC_IMR.access=memorymapped
AT91C_APMC_IMR.address=0xFFFF403C
AT91C_APMC_IMR.width=32
AT91C_APMC_IMR.byteEndian=little
AT91C_APMC_IMR.permission.write=none
AT91C_APMC_IER.name="AT91C_APMC_IER"
AT91C_APMC_IER.description="Interrupt Enable Register"
AT91C_APMC_IER.helpkey="Interrupt Enable Register"
AT91C_APMC_IER.access=memorymapped
AT91C_APMC_IER.address=0xFFFF4034
AT91C_APMC_IER.width=32
AT91C_APMC_IER.byteEndian=little
AT91C_APMC_IER.type=enum
AT91C_APMC_IER.enum.0.name=*** Write only ***
AT91C_APMC_IER.enum.1.name=Error
AT91C_APMC_PMR.name="AT91C_APMC_PMR"
AT91C_APMC_PMR.description="Power Mode Register"
AT91C_APMC_PMR.helpkey="Power Mode Register"
AT91C_APMC_PMR.access=memorymapped
AT91C_APMC_PMR.address=0xFFFF402C
AT91C_APMC_PMR.width=32
AT91C_APMC_PMR.byteEndian=little
AT91C_APMC_SCER.name="AT91C_APMC_SCER"
AT91C_APMC_SCER.description="System Clock Enable Register"
AT91C_APMC_SCER.helpkey="System Clock Enable Register"
AT91C_APMC_SCER.access=memorymapped
AT91C_APMC_SCER.address=0xFFFF4000
AT91C_APMC_SCER.width=32
AT91C_APMC_SCER.byteEndian=little
AT91C_APMC_SCER.type=enum
AT91C_APMC_SCER.enum.0.name=*** Write only ***
AT91C_APMC_SCER.enum.1.name=Error
AT91C_APMC_SCSR.name="AT91C_APMC_SCSR"
AT91C_APMC_SCSR.description="System Clock Status Register"
AT91C_APMC_SCSR.helpkey="System Clock Status Register"
AT91C_APMC_SCSR.access=memorymapped
AT91C_APMC_SCSR.address=0xFFFF4008
AT91C_APMC_SCSR.width=32
AT91C_APMC_SCSR.byteEndian=little
AT91C_APMC_SCSR.permission.write=none
AT91C_APMC_PCER.name="AT91C_APMC_PCER"
AT91C_APMC_PCER.description="Peripheral Clock Enable Register"
AT91C_APMC_PCER.helpkey="Peripheral Clock Enable Register"
AT91C_APMC_PCER.access=memorymapped
AT91C_APMC_PCER.address=0xFFFF4010
AT91C_APMC_PCER.width=32
AT91C_APMC_PCER.byteEndian=little
AT91C_APMC_PCER.type=enum
AT91C_APMC_PCER.enum.0.name=*** Write only ***
AT91C_APMC_PCER.enum.1.name=Error
AT91C_APMC_SCDR.name="AT91C_APMC_SCDR"
AT91C_APMC_SCDR.description="System Clock Disable Register"
AT91C_APMC_SCDR.helpkey="System Clock Disable Register"
AT91C_APMC_SCDR.access=memorymapped
AT91C_APMC_SCDR.address=0xFFFF4004
AT91C_APMC_SCDR.width=32
AT91C_APMC_SCDR.byteEndian=little
AT91C_APMC_SCDR.type=enum
AT91C_APMC_SCDR.enum.0.name=*** Write only ***
AT91C_APMC_SCDR.enum.1.name=Error
AT91C_APMC_PCDR.name="AT91C_APMC_PCDR"
AT91C_APMC_PCDR.description="Peripheral Clock Disable Register"
AT91C_APMC_PCDR.helpkey="Peripheral Clock Disable Register"
AT91C_APMC_PCDR.access=memorymapped
AT91C_APMC_PCDR.address=0xFFFF4014
AT91C_APMC_PCDR.width=32
AT91C_APMC_PCDR.byteEndian=little
AT91C_APMC_PCDR.type=enum
AT91C_APMC_PCDR.enum.0.name=*** Write only ***
AT91C_APMC_PCDR.enum.1.name=Error
AT91C_APMC_IDR.name="AT91C_APMC_IDR"
AT91C_APMC_IDR.description="Interrupt Disable Register"
AT91C_APMC_IDR.helpkey="Interrupt Disable Register"
AT91C_APMC_IDR.access=memorymapped
AT91C_APMC_IDR.address=0xFFFF4038
AT91C_APMC_IDR.width=32
AT91C_APMC_IDR.byteEndian=little
AT91C_APMC_IDR.type=enum
AT91C_APMC_IDR.enum.0.name=*** Write only ***
AT91C_APMC_IDR.enum.1.name=Error
# ========== Register definition for RTC peripheral ========== 
AT91C_RTC_IMR.name="AT91C_RTC_IMR"
AT91C_RTC_IMR.description="Interrupt Mask Register"
AT91C_RTC_IMR.helpkey="Interrupt Mask Register"
AT91C_RTC_IMR.access=memorymapped
AT91C_RTC_IMR.address=0xFFFB8028
AT91C_RTC_IMR.width=32
AT91C_RTC_IMR.byteEndian=little
AT91C_RTC_IMR.permission.write=none
AT91C_RTC_IER.name="AT91C_RTC_IER"
AT91C_RTC_IER.description="Interrupt Enable Register"
AT91C_RTC_IER.helpkey="Interrupt Enable Register"
AT91C_RTC_IER.access=memorymapped
AT91C_RTC_IER.address=0xFFFB8020
AT91C_RTC_IER.width=32
AT91C_RTC_IER.byteEndian=little
AT91C_RTC_IER.type=enum
AT91C_RTC_IER.enum.0.name=*** Write only ***
AT91C_RTC_IER.enum.1.name=Error
AT91C_RTC_SR.name="AT91C_RTC_SR"
AT91C_RTC_SR.description="Status Register"
AT91C_RTC_SR.helpkey="Status Register"
AT91C_RTC_SR.access=memorymapped
AT91C_RTC_SR.address=0xFFFB8018
AT91C_RTC_SR.width=32
AT91C_RTC_SR.byteEndian=little
AT91C_RTC_SR.permission.write=none
AT91C_RTC_TAR.name="AT91C_RTC_TAR"
AT91C_RTC_TAR.description="Time Alarm Register"
AT91C_RTC_TAR.helpkey="Time Alarm Register"
AT91C_RTC_TAR.access=memorymapped
AT91C_RTC_TAR.address=0xFFFB8010
AT91C_RTC_TAR.width=32
AT91C_RTC_TAR.byteEndian=little
AT91C_RTC_TIMR.name="AT91C_RTC_TIMR"
AT91C_RTC_TIMR.description="Time Register"
AT91C_RTC_TIMR.helpkey="Time Register"
AT91C_RTC_TIMR.access=memorymapped
AT91C_RTC_TIMR.address=0xFFFB8008
AT91C_RTC_TIMR.width=32
AT91C_RTC_TIMR.byteEndian=little
AT91C_RTC_MR.name="AT91C_RTC_MR"
AT91C_RTC_MR.description="Mode Register"