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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML//EN"><HTML><HEAD><TITLE>RTOS - Australian Real Time Embedded Systems (ARTESYS) - CORTEX - COncurrent Real Time Executive - real-time kernel and embedded software</TITLE><META name="description" content="Australian Real Time Embedded Systems (ARTESYS) - CORTEX - COncurrent Real Time EXecutive - RTOS - real-time embedded kernel - TI TMS320C3X - Hitachi H8/8003, H8S, SH/3 - POSIX.4 - source code - no royalty"><META name="keywords" content="Australian Real Time Embedded Systems (ARTESYS), ARTESYS, CORTEX, concurrent real time executive, RTOS, kernel, OS, real-time, embedded, real-time kernel, real-time operating system, operating system, Real-Time Market, embedded software, concurrent, executive, TMS320C3X, Hitachi H8/8003, H8/8003, Hitachi H8S, H8S, POSIX.4"><META http-equiv="content-type" content="text/html"><META http-equiv="charset" content="iso-8859-1"><!-- Created by: Vadim Azarovsky, 24-Jan-1999 --><!-- Changed by: Vadim Azarovsky, 26-Jan-1999 --><!-- Changed by: Victor Gorine, 27-Jan-1999 --><!-- Changed by: Vadim Azarovsky, 28-Jan-2000 --></HEAD><BODY background="cortex/doc/icons/artesys_logo_bg.gif"><H1>CORTEX History</H1><HR>The creation of <B><I>CORTEX</I></B> is connected with the intention of <B><A HREF="http://www.codan.com.au">Codan Pty Ltd</A></B> (the company we have been working for) to create a variety of new products.In 1997 <B><A HREF="http://www.codan.com.au">Codan Pty Ltd</a></B>has started to develop a range of new generation products and as a part of this process requirements for a real-time operating system were realised:<UL><LI>the kernel shall be designed as a general purpose off-the-shelf software suitable for a wide range of applications<LI>all particular details of underlying hardware shall be hidden from the kernel internals to provide high level of portability<LI>the system shall be easy to understand and maintain, without unnecessary overheads and fancy features<LI>the kernel shall provide rapid response on external events even in kernel mode;<LI>hardware interrupt manager shall allow to control interrupt latency on individual basis<LI>the kernel shall be able to support different interrupt control models<LI>time-based, re-entrant, fully preemptive, event-driven, deterministic and priority-based multi-tasking environment shall be provided<LI>comprehensive set of popular inter-tasks communication and synchronisation primitives shall be available and optimised to reduce system overheads<LI>single timeout interval shall be allowed to be spread on a sequence of events<LI>flexible memory management component shall reflect individual parameters of the different memory segments</UL>While none of the above requirements is a ground-breaking one, the challengewas to combine all of them within a single system.<P>At the end of 1997 we decided to design a new operating kernelwhich would satisfy above requirements.Since of the beginning of 1998, when the project has been started, the management and software development staff of <B>Codan Pty Ltd</B> had been encouraging our voluntary efforts.<P>In the middle of 1998 <I><B>CORTEX</B></I> and its first portfor TMS320C3X platform were implemented and successfully introduced in newCodan products. Since then it appeared to be very stable and well performing system. <P>By the end of 1998 ports for Hitachi H8/300H and POSIX.4 ( forSUN SPARC SOLARIS 2.5) were implemented. Some extensions have beenimplemented as well.<P>In 1999 <I><B>AUSTRALIAN REAL TIME EMBEDDED SYSTEMS (ARTESYS)</B></I> has been established in as an official body responsible for distribution, support, maintainance and further development of <I><B>CORTEX</B></I>and related products.<P><HR><H6>Copyright (c) 1999-2000, Australian Real Time Embedded Systems (ARTESYS), All Rights Reserved</H6></BODY></HTML>⌨️ 快捷键说明
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