📄 nkmips.h
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//
// Copyright (c) Microsoft Corporation. All rights reserved.
//
//
// This source code is licensed under Microsoft Shared Source License
// Version 1.0 for Windows CE.
// For a copy of the license visit http://go.microsoft.com/fwlink/?LinkId=3223.
//
/*++ BUILD Version: 0015 Increment this if a change has global effects
Module Name:
nkmips.h
Abstract:
User-mode visible Mips specific structures and constants
--*/
#ifndef _NTMIPS_
#define _NTMIPS_
#include "mipsinst.h"
#include "m16inst.h"
// begin_ntddk begin_nthal
#if defined(_MIPS_)
//
// Define system time structure.
//
typedef struct _KSYSTEM_TIME {
ULONG LowPart;
LONG High1Time;
LONG High2Time;
} KSYSTEM_TIME, *PKSYSTEM_TIME;
//
// Define unsupported "keywords".
//
#define _cdecl
//
// Define breakpoint codes.
//
#define USER_BREAKPOINT 0 // user breakpoint
#define KERNEL_BREAKPOINT 1 // kernel breakpoint
#define BREAKIN_BREAKPOINT 2 // break into kernel debugger
#define BRANCH_TAKEN_BREAKPOINT 3 // branch taken breakpoint
#define BRANCH_NOT_TAKEN_BREAKPOINT 4 // branch not taken breakpoint
#define SINGLE_STEP_BREAKPOINT 5 // single step breakpoint
#define DIVIDE_OVERFLOW_BREAKPOINT 6 // divide overflow breakpoint
#define DIVIDE_BY_ZERO_BREAKPOINT 7 // divide by zero breakpoint
#define RANGE_CHECK_BREAKPOINT 8 // range check breakpoint
#define STACK_OVERFLOW_BREAKPOINT 9 // MIPS code
#define MULTIPLY_OVERFLOW_BREAKPOINT 10 // multiply overflow breakpoint
//
// Define length of exception code dispatch vector.
//
#define XCODE_VECTOR_LENGTH 32
// begin_winnt
#if defined(_MIPS_)
//
// Integer Context Frame
//
// This frame is used to store a limited processor context into the
// Thread structure for CPUs which have no floating point support.
//
typedef struct _ICONTEXT {
//
// This section is specified/returned if the ContextFlags word contains
// the flag CONTEXT_INTEGER.
//
// N.B. The registers gp, sp, and ra are defined in this section, but are
// considered part of the control context rather than part of the integer
// context.
//
// N.B. Register zero is not stored in the frame.
//
ULONG BadVAddr;
///REG_TYPE IntZero;
REG_TYPE IntAt;
REG_TYPE IntV0;
REG_TYPE IntV1;
REG_TYPE IntA0;
REG_TYPE IntA1;
REG_TYPE IntA2;
REG_TYPE IntA3;
REG_TYPE IntT0;
REG_TYPE IntT1;
REG_TYPE IntT2;
REG_TYPE IntT3;
REG_TYPE IntT4;
REG_TYPE IntT5;
REG_TYPE IntT6;
REG_TYPE IntT7;
REG_TYPE IntS0;
REG_TYPE IntS1;
REG_TYPE IntS2;
REG_TYPE IntS3;
REG_TYPE IntS4;
REG_TYPE IntS5;
REG_TYPE IntS6;
REG_TYPE IntS7;
REG_TYPE IntT8;
REG_TYPE IntT9;
REG_TYPE IntK0;
REG_TYPE IntK1;
REG_TYPE IntGp;
REG_TYPE IntSp;
REG_TYPE IntS8;
REG_TYPE IntRa;
REG_TYPE IntLo;
REG_TYPE IntHi;
//
// This section is specified/returned if the ContextFlags word contains
// the flag CONTEXT_FLOATING_POINT.
//
ULONG Fsr;
//
// This section is specified/returned if the ContextFlags word contains
// the flag CONTEXT_CONTROL.
//
// N.B. The registers gp, sp, and ra are defined in the integer section,
// but are considered part of the control context rather than part of
// the integer context.
//
ULONG Fir;
ULONG Psr;
//
// The flags values within this flag control the contents of
// a CONTEXT record.
//
// If the context record is used as an input parameter, then
// for each portion of the context record controlled by a flag
// whose value is set, it is assumed that that portion of the
// context record contains valid context. If the context record
// is being used to modify a thread's context, then only that
// portion of the threads context will be modified.
//
// If the context record is used as an IN OUT parameter to capture
// the context of a thread, then only those portions of the thread's
// context corresponding to set flags will be returned.
//
// The context record is never used as an OUT only parameter.
//
ULONG ContextFlags;
#ifdef MIPS_HAS_FPU
FREG_TYPE FltF0;
FREG_TYPE FltF1;
FREG_TYPE FltF2;
FREG_TYPE FltF3;
FREG_TYPE FltF4;
FREG_TYPE FltF5;
FREG_TYPE FltF6;
FREG_TYPE FltF7;
FREG_TYPE FltF8;
FREG_TYPE FltF9;
FREG_TYPE FltF10;
FREG_TYPE FltF11;
FREG_TYPE FltF12;
FREG_TYPE FltF13;
FREG_TYPE FltF14;
FREG_TYPE FltF15;
FREG_TYPE FltF16;
FREG_TYPE FltF17;
FREG_TYPE FltF18;
FREG_TYPE FltF19;
FREG_TYPE FltF20;
FREG_TYPE FltF21;
FREG_TYPE FltF22;
FREG_TYPE FltF23;
FREG_TYPE FltF24;
FREG_TYPE FltF25;
FREG_TYPE FltF26;
FREG_TYPE FltF27;
FREG_TYPE FltF28;
FREG_TYPE FltF29;
FREG_TYPE FltF30;
FREG_TYPE FltF31;
#endif
} ICONTEXT, *PICONTEXT;
#define CALLEE_SAVED_REGS (10 * sizeof(REG_TYPE)) // (s0 - s8, gp)
#define CPUCONTEXT ICONTEXT /* only need integer context */
#define retValue ctx.IntV0
#define ARG0 ctx.IntA0
#define SetThreadIP(pth, addr) ((pth)->ctx.Fir = (ULONG)(addr))
#define GetThreadIP(pth) ((pth)->ctx.Fir)
/* Macros for handling stack shrinkage. */
#define MDTestStack(pth) (((pth)->ctx.IntSp < 0x80000000 \
&& (KSTKBOUND(pth)>>VA_PAGE) < (((pth)->ctx.IntSp-32)>>VA_PAGE)) \
? KSTKBOUND(pth) : 0)
#define MDShrinkStack(pth) (KSTKBOUND(pth) += PAGE_SIZE)
#include "mem_mips.h"
#endif // MIPS
// end_winnt
#define CONTEXT_TO_PROGRAM_COUNTER(Context) ((Context)->Fir)
#define CONTEXT_TO_FRAME_POINTER(Context) ((Context)->IntSp)
#define CONTEXT_TO_PARAM_1(Context) (*(DWORD*) CONTEXT_TO_FRAME_POINTER(Context))
#define CONTEXT_TO_PARAM_2(Context) (*(DWORD*) (CONTEXT_TO_FRAME_POINTER(Context) + 1 * sizeof(REG_TYPE)))
#define CONTEXT_TO_PARAM_3(Context) (*(DWORD*) (CONTEXT_TO_FRAME_POINTER(Context) + 2 * sizeof(REG_TYPE)))
#define CONTEXT_TO_PARAM_4(Context) (*(DWORD*) (CONTEXT_TO_FRAME_POINTER(Context) + 3 * sizeof(REG_TYPE)))
#define CONTEXT_LENGTH (sizeof(CONTEXT))
#define CONTEXT_ALIGN (sizeof(ULONG))
#define CONTEXT_ROUND (CONTEXT_ALIGN - 1)
// begin_nthal
//
// Define R4000 system coprocessor registers.
//
// Define index register fields.
//
typedef struct _INDEX {
ULONG INDEX : 6;
ULONG X1 : 25;
ULONG P : 1;
} INDEX;
//
// Define random register fields.
//
typedef struct _RANDOM {
ULONG INDEX : 6;
ULONG X1 : 26;
} RANDOM;
//
// Define TB entry low register fields.
//
typedef struct _ENTRYLO {
ULONG G : 1;
ULONG V : 1;
ULONG D : 1;
ULONG C : 3;
ULONG PFN : 24;
ULONG X1 : 2;
} ENTRYLO, *PENTRYLO;
//
// Define R4000 PTE format for memory management.
//
// N.B. This must map exactly over the entrylo register.
//
typedef struct _HARDWARE_PTE {
ULONG Global : 1;
ULONG Valid : 1;
ULONG Dirty : 1;
ULONG CachePolicy : 3;
ULONG PageFrameNumber : 24;
ULONG Write : 1;
ULONG CopyOnWrite : 1;
} HARDWARE_PTE, *PHARDWARE_PTE;
//
// Define R4000 macro to initialize page directory table base.
//
#define INITIALIZE_DIRECTORY_TABLE_BASE(dirbase, pfn) \
((HARDWARE_PTE *)(dirbase))->PageFrameNumber = pfn; \
((HARDWARE_PTE *)(dirbase))->Global = 0; \
((HARDWARE_PTE *)(dirbase))->Valid = 1; \
((HARDWARE_PTE *)(dirbase))->Dirty = 1; \
((HARDWARE_PTE *)(dirbase))->CachePolicy = PCR->CachePolicy
//
// Define page mask register fields.
//
typedef struct _PAGEMASK {
ULONG X1 : 13;
ULONG PAGEMASK : 12;
ULONG X2 : 7;
} PAGEMASK, *PPAGEMASK;
//
// Define wired register fields.
//
typedef struct _WIRED {
ULONG NUMBER : 6;
ULONG X1 : 26;
} WIRED;
//
// Define TB entry high register fields.
//
typedef struct _ENTRYHI {
ULONG PID : 8;
ULONG X1 : 5;
ULONG VPN2 : 19;
} ENTRYHI, *PENTRYHI;
//
// Define processor status register fields.
//
typedef struct _PSR {
ULONG IE : 1;
ULONG EXL : 1;
ULONG ERL : 1;
ULONG KSU : 2;
ULONG UX : 1;
ULONG SX : 1;
ULONG KX : 1;
ULONG INTMASK : 8;
ULONG DE : 1;
ULONG CE : 1;
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