📄 44binit.lst
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dleXXX to r0
71 0000039C E5900000 ldr r0,[r0] ;load the contents(service r
outine start address) of Han
dleXXX
72 000003A0 E58D0004 str r0,[sp,#4] ;store the contents(ISR) of
HandleXXX to stack
73 000003A4 E8BD8001 ldmfd sp!,{r0,pc} ;POP the work register and p
c(jump to ISR)
180 000003A8 HandlerZDMA0
HANDLER HandleZDMA0
66 000003A8
67 000003A8 HandlerZDMA0
68 000003A8 E24DD004 sub sp,sp,#4 ;decrement sp(to store jump
address)
69 000003AC E92D0001 stmfd sp!,{r0} ;PUSH the work register to s
tack(lr does not push becaus
e it return to original addr
ess)
70 000003B0 E59F02A0 ldr r0,=HandleZDMA0 ;load the address of Han
dleXXX to r0
71 000003B4 E5900000 ldr r0,[r0] ;load the contents(service r
outine start address) of Han
dleXXX
72 000003B8 E58D0004 str r0,[sp,#4] ;store the contents(ISR) of
HandleXXX to stack
73 000003BC E8BD8001 ldmfd sp!,{r0,pc} ;POP the work register and p
c(jump to ISR)
181 000003C0 HandlerTICK
HANDLER HandleTICK
66 000003C0
67 000003C0 HandlerTICK
68 000003C0 E24DD004 sub sp,sp,#4 ;decrement sp(to store jump
address)
69 000003C4 E92D0001 stmfd sp!,{r0} ;PUSH the work register to s
tack(lr does not push becaus
e it return to original addr
ARM Macro Assembler Page 17
ess)
70 000003C8 E59F028C ldr r0,=HandleTICK ;load the address of Hand
leXXX to r0
71 000003CC E5900000 ldr r0,[r0] ;load the contents(service r
outine start address) of Han
dleXXX
72 000003D0 E58D0004 str r0,[sp,#4] ;store the contents(ISR) of
HandleXXX to stack
73 000003D4 E8BD8001 ldmfd sp!,{r0,pc} ;POP the work register and p
c(jump to ISR)
182 000003D8 HandlerEINT4567
HANDLER HandleEINT4567
66 000003D8
67 000003D8 HandlerEINT4567
68 000003D8 E24DD004 sub sp,sp,#4 ;decrement sp(to store jump
address)
69 000003DC E92D0001 stmfd sp!,{r0} ;PUSH the work register to s
tack(lr does not push becaus
e it return to original addr
ess)
70 000003E0 E59F0278 ldr r0,=HandleEINT4567 ;load the address of
HandleXXX to r0
71 000003E4 E5900000 ldr r0,[r0] ;load the contents(service r
outine start address) of Han
dleXXX
72 000003E8 E58D0004 str r0,[sp,#4] ;store the contents(ISR) of
HandleXXX to stack
73 000003EC E8BD8001 ldmfd sp!,{r0,pc} ;POP the work register and p
c(jump to ISR)
183 000003F0 HandlerEINT3
HANDLER HandleEINT3
66 000003F0
67 000003F0 HandlerEINT3
68 000003F0 E24DD004 sub sp,sp,#4 ;decrement sp(to store jump
address)
69 000003F4 E92D0001 stmfd sp!,{r0} ;PUSH the work register to s
tack(lr does not push becaus
e it return to original addr
ess)
70 000003F8 E59F0264 ldr r0,=HandleEINT3 ;load the address of Han
dleXXX to r0
71 000003FC E5900000 ldr r0,[r0] ;load the contents(service r
outine start address) of Han
dleXXX
72 00000400 E58D0004 str r0,[sp,#4] ;store the contents(ISR) of
HandleXXX to stack
73 00000404 E8BD8001 ldmfd sp!,{r0,pc} ;POP the work register and p
c(jump to ISR)
184 00000408 HandlerEINT2
HANDLER HandleEINT2
66 00000408
67 00000408 HandlerEINT2
68 00000408 E24DD004 sub sp,sp,#4 ;decrement sp(to store jump
address)
69 0000040C E92D0001 stmfd sp!,{r0} ;PUSH the work register to s
tack(lr does not push becaus
e it return to original addr
ess)
70 00000410 E59F0250 ldr r0,=HandleEINT2 ;load the address of Han
ARM Macro Assembler Page 18
dleXXX to r0
71 00000414 E5900000 ldr r0,[r0] ;load the contents(service r
outine start address) of Han
dleXXX
72 00000418 E58D0004 str r0,[sp,#4] ;store the contents(ISR) of
HandleXXX to stack
73 0000041C E8BD8001 ldmfd sp!,{r0,pc} ;POP the work register and p
c(jump to ISR)
185 00000420 HandlerEINT1
HANDLER HandleEINT1
66 00000420
67 00000420 HandlerEINT1
68 00000420 E24DD004 sub sp,sp,#4 ;decrement sp(to store jump
address)
69 00000424 E92D0001 stmfd sp!,{r0} ;PUSH the work register to s
tack(lr does not push becaus
e it return to original addr
ess)
70 00000428 E59F023C ldr r0,=HandleEINT1 ;load the address of Han
dleXXX to r0
71 0000042C E5900000 ldr r0,[r0] ;load the contents(service r
outine start address) of Han
dleXXX
72 00000430 E58D0004 str r0,[sp,#4] ;store the contents(ISR) of
HandleXXX to stack
73 00000434 E8BD8001 ldmfd sp!,{r0,pc} ;POP the work register and p
c(jump to ISR)
186 00000438 HandlerEINT0
HANDLER HandleEINT0
66 00000438
67 00000438 HandlerEINT0
68 00000438 E24DD004 sub sp,sp,#4 ;decrement sp(to store jump
address)
69 0000043C E92D0001 stmfd sp!,{r0} ;PUSH the work register to s
tack(lr does not push becaus
e it return to original addr
ess)
70 00000440 E59F0228 ldr r0,=HandleEINT0 ;load the address of Han
dleXXX to r0
71 00000444 E5900000 ldr r0,[r0] ;load the contents(service r
outine start address) of Han
dleXXX
72 00000448 E58D0004 str r0,[sp,#4] ;store the contents(ISR) of
HandleXXX to stack
73 0000044C E8BD8001 ldmfd sp!,{r0,pc} ;POP the work register and p
c(jump to ISR)
187 00000450
188 00000450
189 00000450 ;One of the following two routines can be used for non-v
ectored interrupt.
190 00000450
191 00000450 IsrIRQ ;using I_ISPR register.
192 00000450 E24DD004 sub sp,sp,#4 ;reserved for PC
193 00000454 E92D0300 stmfd sp!,{r8-r9}
194 00000458
195 00000458 ;IMPORTANT CAUTION
196 00000458 ;if I_ISPC is not used properly, I_ISPR can be 0 in this
routine.
197 00000458
ARM Macro Assembler Page 19
198 00000458 E59F9214 ldr r9,=I_ISPR
199 0000045C E5999000 ldr r9,[r9]
200 00000460
201 00000460 E3590000 cmp r9, #0x0 ;If the IDLE mode work-aroun
d is used,
202 00000464 ;r9 may be 0 sometimes.
203 00000464 0A000009 beq %F2
204 00000468
205 00000468 E3A08000 mov r8,#0x0
206 0000046C 0
207 0000046C E1B090A9 movs r9,r9,lsr #1
208 00000470 2A000001 bcs %F1
209 00000474 E2888004 add r8,r8,#4
210 00000478 EAFFFFFB b %B0
211 0000047C
212 0000047C 1
213 0000047C E59F9188 ldr r9,=HandleADC
214 00000480 E0899008 add r9,r9,r8
215 00000484 E5999000 ldr r9,[r9]
216 00000488 E58D9008 str r9,[sp,#8]
217 0000048C E8BD8300 ldmfd sp!,{r8-r9,pc}
218 00000490
219 00000490 2
220 00000490 E8BD0300 ldmfd sp!,{r8-r9}
221 00000494 E28DD004 add sp,sp,#4
222 00000498 E25EF004 subs pc,lr,#4
223 0000049C
224 0000049C ;****************************************************
225 0000049C ;* START *
226 0000049C ;****************************************************
227 0000049C ResetHandler
228 0000049C E59F01D8 ldr r0,=WTCON ;watch dog disable
229 000004A0 E3A01000 ldr r1,=0x0
230 000004A4 E5801000 str r1,[r0]
231 000004A8
232 000004A8 E59F01D0 ldr r0,=INTMSK
233 000004AC E3E0133E ldr r1,=0x07ffffff ;all interrupt disable
234 000004B0 E5801000 str r1,[r0]
235 000004B4
236 000004B4 ;****************************************************
237 000004B4 ;* Set clock control registers *
238 000004B4 ;****************************************************
239 000004B4 E59F01C8 ldr r0,=LOCKTIME
240 000004B8 E59F11C8 ldr r1,=0xfff
241 000004BC E5801000 str r1,[r0]
242 000004C0
243 000004C0 [ PLLONSTART
244 000004C0 E3A00776 ldr r0,=PLLCON ;temporary setting of PLL
245 000004C4 E59F11C0 ldr r1,=((M_DIV<<12)+(P_DIV<<4)+S_DIV)
;Fin=10MHz,Fout=40MHz
246 000004C8 E5801000 str r1,[r0]
247 000004CC ]
248 000004CC
249 000004CC E59F01BC ldr r0,=CLKCON
250 000004D0 E59F11BC ldr r1,=0x7ff8 ;All unit block CLK enable
251 000004D4 E5801000 str r1,[r0]
252 000004D8
253 000004D8 ;****************************************
254 000004D8 ;* change BDMACON reset value for BDMA *
ARM Macro Assembler Page 20
255 000004D8 ;****************************************
256 000004D8 E59F01B8 ldr r0,=BDIDES0
257 000004DC E3A01101 ldr r1,=0x40000000 ;BDIDESn reset value shou
ld be 0x40000000
258 000004E0 E5801000 str r1,[r0]
259 000004E4
260 000004E4 E59F01B0 ldr r0,=BDIDES1
261 000004E8 E3A01101 ldr r1,=0x40000000 ;BDIDESn reset value shou
ld be 0x40000000
262 000004EC E5801000 str r1,[r0]
263 000004F0
264 000004F0 ;****************************************************
265 000004F0 ;* Set memory control registers *
266 000004F0 ;****************⌨️ 快捷键说明
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