📄 conv_gsm_1by2_5.asm
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/*******************************************************************************
Copyright(c) 2000 - 2002 Analog Devices. All Rights Reserved.
Developed by Joint Development Software Application Team, IPDC, Bangalore, India
for Blackfin DSPs ( Micro Signal Architecture 1.0 specification).
By using this module you agree to the terms of the Analog Devices License
Agreement for DSP Software.
********************************************************************************
Module name : conv_gsm_1by2_5.asm
Label name : __conv_gsm_1by2_5
Version : 1.3
Change History :
Version Date Author Comments
1.3 11/18/2002 Swarnalatha Tested with VDSP++ 3.0
compiler 6.2.2 on
ADSP-21535 Rev.0.2
1.2 11/13/2002 Swarnalatha Tested with VDSP++ 3.0
on ADSP-21535 Rev. 0.2
1.1 01/22/2002 Swarnalatha Modified to match
silicon cycle count
1.0 03/15/2001 Swarnalatha Original
Description : This function performs convolution coding for the
polynomials G0 = 23 and G1 = 33, used in GSM. The function
produces the coded output for a given input message data. The
result is stored in the output buffer. The parameters passed
should be in the order d,o,a.
d = Start address of the message data which has to be encoded
o = Pointer to the output of the encoder
a = Number of bits in the input message data
Assumptions : The number of bits must be a multiple of 16.
Implementation : Let the message bits be x0,x1,x2,......x15.The first generator
polynomial is G0 = 23 = 10011 = 1+D**3+D**4.
The output 16 bit word(for G0) for a message of 16 bits is
given by
| c0[1] | | x0 | | 0 | | 0 | | 0 | | 0 |
| c0[2] | | x1 | | 0 | | 0 | | 0 | | 0 |
| c0[3] | | x2 | | 0 | | 0 | | 0 | | 0 |
| c0[4] | = | x3 | ^ | 0 | ^ | 0 | ^ | x0| ^ | 0 |
| c0[5] | | x4 | | 0 | | 0 | | x1| | x0|
| .... | | .. | | ..| | ..| | ..| | ..|
| c0[16]| | x15| | 0 | | 0 | |x12| |x11|
......... [1]
The second polynomial is G1 = 33 = 11011 = 1+D+D**3+D**4.
The output 16 bit word(for G1) for a message of 16 bits is
given by
| c0[1] | | x0 | | 0 | | 0 | | 0 | | 0 |
| c0[2] | | x1 | | x0| | 0 | | 0 | | 0 |
| c0[3] | | x2 | | x1| | 0 | | 0 | | 0 |
| c0[4] | = | x3 | ^ | x2| ^ | 0 | ^ | x0| ^ | 0 |
| c0[5] | | x4 | | x3| | 0 | | x1| | x0|
| ..... | | .. | | ..| | ..| | ..| | ..|
| c0[16]| | x15| |x14| | 0 | |x12| |x11|
Prototype :
void _conv_gsm_1by2_5(
fract16 * , //Start address of message data 'd'
char *, //Pointer To The output 'o'
int //Number of message bits
);
Registers used : A0, R0-R7, I0-I2, M0, L0-L2, P0-P2, LC0, LC1.
Performance :
Code size : 142 Bytes
If number of message bits = a
Kernel cycle count : [(a/16)*(18+16*3)]
Cycle Count : 160 Cycles (for a = 32)
*******************************************************************************/
.section L1_code;
.global __conv_gsm_1by2_5;
.align 8;
__conv_gsm_1by2_5:
[--SP] = (R7:4); //Push the call save register R7,R6,R5 and R4
L0 = 0;
L1 = 0;
L2 = 0;
I1 = R0; //Start address of the message data
M0 = 15;
I0 = R1; //Address of output;
R1 = 0;
R2 = R2 >> 4; //R2 contains the number of bits in the input
//message data
[--SP] = R1;
P1 = R2; //Number of 16bit messages in the frame
A0 = 0 || I0+= M0;
P0 = I0;
P2 = 16;
R6 = A0 || R7 = [SP++]; //R6 and R7 are initialized to zero
R0 = A0 || R1.L = W[I1++];
//Message data which has to be encoded;
LSETUP(CONV_START,CONV_END)LC1 = P1;
CONV_START:
R2 = R1 << 3; //Fourth column of Equation [1]
R2 = R2 | R6;
R3 = R1 << 4; //Fifth column of Equation [1]
R3 = R3 | R7;
R4 = R1 ^ R2;
R4 = R4 ^ R3;
R4 = R4 << 16; //R4.H = R4.L
R5 = R1 << 1; //Second column of Equation [2]
R5 = R5 | R0;
R5 = R5 ^ R1;
R5 = R5 ^ R2;
R5 = R5 ^ R3;
R5 = R5 << 16; //R5.H = R5.L
LSETUP(CODE_START,CODE_END)LC0 = P2;
CODE_START:
BITMUX(R4,R5,A0)(ASL);
//packing the first and second coded bits
R7 = A0.W;
CODE_END:
A0 = 0 || B[P0--] = R7;
//Storing the codeword in the output buffer
P0 += 32;
R6 = R1 >> 13; //Restoring 3 bits of previous 16 bit data
R0 = R1 >> 15; //Restoring 1 bit of previous 16 bit data
CONV_END:
R7 = R1 >> 12 || R1.L = W[I1++];
//Fetch the next input message data
(R7:4) = [SP++]; //Pop the call save registers R7,R6,R5 and R4
RTS;
NOP; //to avoid one stall if LINK or UNLINK happens to be
//the next instruction after RTS in the memory.
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