📄 main.lst
字号:
007C F599 MOV SBUF,A
007E ?C0042:
; SOURCE LINE # 158
007E 3099FD JNB TI,?C0042
0081 ?C0043:
C51 COMPILER V7.06 MAIN 11/29/2004 16:44:51 PAGE 10
; SOURCE LINE # 160
0081 E4 CLR A
0082 F500 R MOV flash_addr,A
0084 F500 R MOV flash_addr+01H,A
; SOURCE LINE # 161
0086 F500 R MOV mode,A
; SOURCE LINE # 162
0088 F500 R MOV block_written,A
008A F500 R MOV block_written+01H,A
; SOURCE LINE # 164
008C 7500FE R MOV led1,#0FEH
; SOURCE LINE # 165
008F 850090 R MOV P1,led1
0092 ?C0044:
; SOURCE LINE # 167
; SOURCE LINE # 168
; SOURCE LINE # 171
0092 C298 CLR RI
0094 ?C0046:
; SOURCE LINE # 172
0094 3098FD JNB RI,?C0046
0097 ?C0047:
; SOURCE LINE # 174
;---- Variable 'check_sum' assigned to Register 'R7' ----
0097 E4 CLR A
0098 FF MOV R7,A
; SOURCE LINE # 176
0099 C299 CLR TI
; SOURCE LINE # 177
009B F599 MOV SBUF,A
009D ?C0048:
; SOURCE LINE # 178
009D 3099FD JNB TI,?C0048
00A0 ?C0049:
; SOURCE LINE # 180
00A0 E4 CLR A
00A1 F500 R MOV i,A
00A3 ?C0050:
00A3 E500 R MOV A,i
00A5 C3 CLR C
00A6 9440 SUBB A,#040H
00A8 5014 JNC ?C0051
; SOURCE LINE # 181
; SOURCE LINE # 182
00AA C298 CLR RI
00AC ?C0053:
; SOURCE LINE # 183
00AC 3098FD JNB RI,?C0053
00AF ?C0054:
; SOURCE LINE # 185
00AF 7400 R MOV A,#LOW buffer
00B1 2500 R ADD A,i
00B3 F8 MOV R0,A
00B4 A699 MOV @R0,SBUF
; SOURCE LINE # 186
00B6 E599 MOV A,SBUF
00B8 2F ADD A,R7
00B9 FF MOV R7,A
; SOURCE LINE # 187
00BA 0500 R INC i
00BC 80E5 SJMP ?C0050
00BE ?C0051:
C51 COMPILER V7.06 MAIN 11/29/2004 16:44:51 PAGE 11
; SOURCE LINE # 190
00BE C298 CLR RI
00C0 ?C0055:
; SOURCE LINE # 191
00C0 3098FD JNB RI,?C0055
00C3 ?C0056:
; SOURCE LINE # 192
00C3 859900 R MOV rdata,SBUF
; SOURCE LINE # 194
00C6 E500 R MOV A,rdata
00C8 6F XRL A,R7
00C9 703C JNZ ?C0057
; SOURCE LINE # 195
; SOURCE LINE # 196
00CB F500 R MOV mode,A
; SOURCE LINE # 197
00CD F500 R MOV i,A
00CF ?C0058:
00CF E500 R MOV A,i
00D1 C3 CLR C
00D2 9440 SUBB A,#040H
00D4 5027 JNC ?C0059
; SOURCE LINE # 198
; SOURCE LINE # 199
00D6 7400 R MOV A,#LOW buffer
00D8 2500 R ADD A,i
00DA F8 MOV R0,A
00DB E6 MOV A,@R0
00DC F500 R MOV rdata,A
; SOURCE LINE # 200
00DE D2CD SETB MXRAM
; SOURCE LINE # 201
00E0 FD MOV R5,A
00E1 AF00 R MOV R7,flash_addr+01H
00E3 AE00 R MOV R6,flash_addr
00E5 120000 E LCALL _FlashWrite
; SOURCE LINE # 202
00E8 7F05 MOV R7,#05H
00EA 7E00 MOV R6,#00H
00EC 120000 R LCALL _delay
; SOURCE LINE # 203
00EF C2CD CLR MXRAM
; SOURCE LINE # 204
00F1 0500 R INC flash_addr+01H
00F3 E500 R MOV A,flash_addr+01H
00F5 7002 JNZ ?C0082
00F7 0500 R INC flash_addr
00F9 ?C0082:
; SOURCE LINE # 205
00F9 0500 R INC i
00FB 80D2 SJMP ?C0058
00FD ?C0059:
; SOURCE LINE # 206
00FD 0500 R INC block_written+01H
00FF E500 R MOV A,block_written+01H
0101 7002 JNZ ?C0083
0103 0500 R INC block_written
0105 ?C0083:
; SOURCE LINE # 207
0105 8003 SJMP ?C0061
0107 ?C0057:
; SOURCE LINE # 209
C51 COMPILER V7.06 MAIN 11/29/2004 16:44:51 PAGE 12
0107 750001 R MOV mode,#01H
010A ?C0061:
; SOURCE LINE # 211
010A E500 R MOV A,block_written+01H
010C 6500 R XRL A,block+01H
010E 7004 JNZ ?C0084
0110 E500 R MOV A,block_written
0112 6500 R XRL A,block
0114 ?C0084:
0114 701E JNZ ?C0062
; SOURCE LINE # 212
; SOURCE LINE # 213
0116 7590FF MOV P1,#0FFH
; SOURCE LINE # 214
0119 C290 CLR P1_0
; SOURCE LINE # 215
011B C291 CLR P1_1
; SOURCE LINE # 217
011D E500 R MOV A,mode
011F 7009 JNZ ?C0063
; SOURCE LINE # 218
; SOURCE LINE # 219
0121 C299 CLR TI
; SOURCE LINE # 220
0123 F599 MOV SBUF,A
0125 ?C0064:
; SOURCE LINE # 221
0125 209949 JB TI,?C0077
0128 80FB SJMP ?C0064
; SOURCE LINE # 222
012A ?C0063:
; SOURCE LINE # 224
; SOURCE LINE # 225
012A C299 CLR TI
; SOURCE LINE # 226
012C 75990F MOV SBUF,#0FH
012F ?C0067:
; SOURCE LINE # 227
012F 20993F JB TI,?C0077
0132 80FB SJMP ?C0067
; SOURCE LINE # 228
; SOURCE LINE # 230
; SOURCE LINE # 231
0134 ?C0062:
; SOURCE LINE # 233
0134 0500 R INC count
; SOURCE LINE # 235
0136 E500 R MOV A,count
0138 75F00C MOV B,#0CH
013B 84 DIV AB
013C E5F0 MOV A,B
013E 7014 JNZ ?C0069
; SOURCE LINE # 236
; SOURCE LINE # 237
0140 850090 R MOV P1,led1
; SOURCE LINE # 238
0143 E500 R MOV A,led1
0145 25E0 ADD A,ACC
0147 F500 R MOV led1,A
; SOURCE LINE # 239
0149 430001 R ORL led1,#01H
; SOURCE LINE # 240
C51 COMPILER V7.06 MAIN 11/29/2004 16:44:51 PAGE 13
014C E500 R MOV A,led1
014E B4FF03 CJNE A,#0FFH,?C0069
; SOURCE LINE # 241
0151 7500FE R MOV led1,#0FEH
; SOURCE LINE # 242
0154 ?C0069:
; SOURCE LINE # 244
0154 E500 R MOV A,mode
0156 700C JNZ ?C0071
; SOURCE LINE # 245
; SOURCE LINE # 246
0158 C299 CLR TI
; SOURCE LINE # 247
015A F599 MOV SBUF,A
015C ?C0072:
; SOURCE LINE # 248
015C 309903 JNB TI,$ + 6H
015F 020000 R LJMP ?C0044
0162 80F8 SJMP ?C0072
; SOURCE LINE # 249
0164 ?C0071:
; SOURCE LINE # 251
; SOURCE LINE # 252
0164 C299 CLR TI
; SOURCE LINE # 253
0166 75990F MOV SBUF,#0FH
0169 ?C0075:
; SOURCE LINE # 254
0169 309903 JNB TI,$ + 6H
016C 020000 R LJMP ?C0044
016F 80F8 SJMP ?C0075
; SOURCE LINE # 255
; SOURCE LINE # 257
0171 ?C0077:
; SOURCE LINE # 259
; SOURCE LINE # 260
; SOURCE LINE # 261
0171 7F60 MOV R7,#060H
0173 7EEA MOV R6,#0EAH
0175 120000 R LCALL _delay
0178 120000 R LCALL _delay
017B 120000 R LCALL _delay
; SOURCE LINE # 262
017E B290 CPL P1_0
; SOURCE LINE # 263
0180 B291 CPL P1_1
; SOURCE LINE # 264
0182 80ED SJMP ?C0077
0184 22 RET
; FUNCTION main (END)
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 490 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = ---- 77
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILER V7.06 MAIN 11/29/2004 16:44:51 PAGE 14
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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