📄 main.lst
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251 3 {
252 4 TI = 0;
253 4 SBUF = 0x0f;
254 4 while( !TI );
255 4 }
256 3
257 3 }
258 2
259 2 while(1)
260 2 {
261 3 delay(60000);delay(60000);delay(60000);
262 3 P1_0 = ~ P1_0;
263 3 P1_1 = ~ P1_1;
264 3 }
265 2 }
266 1 }
C51 COMPILER V7.06 MAIN 11/29/2004 16:44:51 PAGE 6
ASSEMBLY LISTING OF GENERATED OBJECT CODE
; FUNCTION _delay (BEGIN)
; SOURCE LINE # 36
;---- Variable 'count' assigned to Register 'R6/R7' ----
; SOURCE LINE # 37
; SOURCE LINE # 39
;---- Variable 'i' assigned to Register 'R4/R5' ----
0000 E4 CLR A
0001 FD MOV R5,A
0002 FC MOV R4,A
0003 ?C0001:
0003 C3 CLR C
0004 ED MOV A,R5
0005 9F SUBB A,R7
0006 EC MOV A,R4
0007 9E SUBB A,R6
0008 5007 JNC ?C0004
000A 0D INC R5
000B ED MOV A,R5
000C 7001 JNZ ?C0080
000E 0C INC R4
000F ?C0080:
000F 80F2 SJMP ?C0001
; SOURCE LINE # 40
0011 ?C0004:
0011 22 RET
; FUNCTION _delay (END)
; FUNCTION init (BEGIN)
; SOURCE LINE # 43
; SOURCE LINE # 44
; SOURCE LINE # 47
0000 758DFB MOV TH1,#0FBH
; SOURCE LINE # 48
0003 758BFF MOV TL1,#0FFH
; SOURCE LINE # 49
0006 758780 MOV PCON,#080H
; SOURCE LINE # 50
0009 758922 MOV TMOD,#022H
; SOURCE LINE # 51
000C C29F CLR SM0
; SOURCE LINE # 52
000E D29E SETB SM1
; SOURCE LINE # 53
0010 D299 SETB TI
; SOURCE LINE # 54
0012 D298 SETB RI
; SOURCE LINE # 55
0014 D28E SETB TR1
; SOURCE LINE # 56
0016 D29C SETB REN
; SOURCE LINE # 59
0018 D2AF SETB EA
; SOURCE LINE # 61
001A D28A SETB IT1
; SOURCE LINE # 62
001C 22 RET
; FUNCTION init (END)
; FUNCTION erase_flash (BEGIN)
C51 COMPILER V7.06 MAIN 11/29/2004 16:44:51 PAGE 7
; SOURCE LINE # 64
; SOURCE LINE # 65
; SOURCE LINE # 67
0000 D2CD SETB MXRAM
; SOURCE LINE # 68
0002 E4 CLR A
0003 F500 R MOV addr,A
0005 F500 R MOV addr+01H,A
0007 ?C0006:
0007 D3 SETB C
0008 E500 R MOV A,addr+01H
000A 9400 SUBB A,#00H
000C E500 R MOV A,addr
000E 94F0 SUBB A,#0F0H
0010 5021 JNC ?C0007
; SOURCE LINE # 69
0012 ?C0009:
; SOURCE LINE # 70
0012 AF00 R MOV R7,addr+01H
0014 AE00 R MOV R6,addr
0016 120000 E LCALL _SectorErase
0019 EF MOV A,R7
001A 70F6 JNZ ?C0009
001C ?C0010:
; SOURCE LINE # 71
001C E500 R MOV A,addr+01H
001E 7004 JNZ ?C0081
0020 E500 R MOV A,addr
0022 64F0 XRL A,#0F0H
0024 ?C0081:
0024 600D JZ ?C0007
; SOURCE LINE # 72
0026 ?C0008:
0026 E4 CLR A
0027 2500 R ADD A,addr+01H
0029 F500 R MOV addr+01H,A
002B 7410 MOV A,#010H
002D 3500 R ADDC A,addr
002F F500 R MOV addr,A
0031 80D4 SJMP ?C0006
0033 ?C0007:
; SOURCE LINE # 73
0033 C2CD CLR MXRAM
; SOURCE LINE # 74
0035 22 RET
; FUNCTION erase_flash (END)
; FUNCTION main (BEGIN)
; SOURCE LINE # 76
; SOURCE LINE # 77
; SOURCE LINE # 89
0000 120000 R LCALL init
; SOURCE LINE # 90
0003 7590FF MOV P1,#0FFH
; SOURCE LINE # 92
0006 E4 CLR A
0007 F500 R MOV count,A
; SOURCE LINE # 93
; SOURCE LINE # 94
0009 ?C0015:
; SOURCE LINE # 95
; SOURCE LINE # 96
C51 COMPILER V7.06 MAIN 11/29/2004 16:44:51 PAGE 8
; SOURCE LINE # 97
0009 C298 CLR RI
000B ?C0017:
; SOURCE LINE # 98
000B 3098FD JNB RI,?C0017
000E ?C0018:
; SOURCE LINE # 99
000E E599 MOV A,SBUF
0010 6448 XRL A,#048H
0012 7024 JNZ ?C0019
; SOURCE LINE # 100
; SOURCE LINE # 101
0014 C299 CLR TI
; SOURCE LINE # 102
0016 F599 MOV SBUF,A
0018 ?C0020:
; SOURCE LINE # 103
0018 3099FD JNB TI,?C0020
001B ?C0021:
; SOURCE LINE # 105
001B C298 CLR RI
001D ?C0022:
; SOURCE LINE # 107
001D 3098FD JNB RI,?C0022
0020 ?C0023:
; SOURCE LINE # 108
0020 E599 MOV A,SBUF
0022 B45913 CJNE A,#059H,?C0019
; SOURCE LINE # 109
; SOURCE LINE # 110
0025 C299 CLR TI
; SOURCE LINE # 111
0027 E4 CLR A
0028 F599 MOV SBUF,A
002A ?C0025:
; SOURCE LINE # 112
002A 3099FD JNB TI,?C0025
002D ?C0026:
; SOURCE LINE # 114
002D C298 CLR RI
002F ?C0027:
; SOURCE LINE # 115
002F 3098FD JNB RI,?C0027
0032 ?C0028:
; SOURCE LINE # 116
0032 E599 MOV A,SBUF
0034 6453 XRL A,#053H
0036 6005 JZ ?C0016
; SOURCE LINE # 117
; SOURCE LINE # 118
0038 ?C0019:
; SOURCE LINE # 119
0038 7590FF MOV P1,#0FFH
; SOURCE LINE # 120
003B 80CC SJMP ?C0015
003D ?C0016:
; SOURCE LINE # 122
003D 7590FF MOV P1,#0FFH
; SOURCE LINE # 123
0040 C299 CLR TI
; SOURCE LINE # 124
0042 E4 CLR A
C51 COMPILER V7.06 MAIN 11/29/2004 16:44:51 PAGE 9
0043 F599 MOV SBUF,A
0045 ?C0030:
; SOURCE LINE # 125
0045 3099FD JNB TI,?C0030
0048 ?C0031:
; SOURCE LINE # 131
0048 C298 CLR RI
004A ?C0032:
; SOURCE LINE # 132
004A 3098FD JNB RI,?C0032
004D ?C0033:
; SOURCE LINE # 134
004D 7F64 MOV R7,#064H
004F 7E00 MOV R6,#00H
0051 120000 R LCALL _delay
; SOURCE LINE # 137
0054 120000 R LCALL erase_flash
; SOURCE LINE # 139
0057 C299 CLR TI
; SOURCE LINE # 140
0059 E4 CLR A
005A F599 MOV SBUF,A
005C ?C0034:
; SOURCE LINE # 141
005C 3099FD JNB TI,?C0034
005F ?C0035:
; SOURCE LINE # 144
005F C296 CLR P1_6
; SOURCE LINE # 146
0061 C298 CLR RI
0063 ?C0036:
; SOURCE LINE # 147
0063 3098FD JNB RI,?C0036
0066 ?C0037:
; SOURCE LINE # 148
0066 859900 R MOV block,SBUF
; SOURCE LINE # 149
0069 C299 CLR TI
; SOURCE LINE # 150
006B E4 CLR A
006C F599 MOV SBUF,A
006E ?C0038:
; SOURCE LINE # 151
006E 3099FD JNB TI,?C0038
0071 ?C0039:
; SOURCE LINE # 153
0071 C298 CLR RI
0073 ?C0040:
; SOURCE LINE # 154
0073 3098FD JNB RI,?C0040
0076 ?C0041:
; SOURCE LINE # 155
0076 859900 R MOV block+01H,SBUF
; SOURCE LINE # 156
0079 C299 CLR TI
; SOURCE LINE # 157
007B E4 CLR A
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